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TC1797_14 Datasheet, PDF (164/192 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller
TC1797
Electrical Parameters
5.3.7 BFCLKO Output Clock Timing
VSS = 0 V;VDD = 1.5 V ± 5%; VDDEBU = 2.5 V ± 5% and 3.3 V ± 5%,;
TA = -40 °C to +125 °C; CL = 35 pF
Table 21 BFCLK0 Output Clock Timing Parameters1)
Parameter
Symbol
Min.
Values
Typ. Max.
Unit Note /
Test Con
dition
BFCLKO clock period
tBFCLKO CC 13.332) –
–
ns –
BFCLKO high time
t5
CC 3
–
–
ns –
BFCLKO low time
t6
CC 3
–
–
ns –
BFCLKO rise time
t7
CC –
–
3
ns –
BFCLKO fall time
t8 CC
–
–
3
BFCLKO duty cycle t5/(t5 + t6)3) DC
45
50 55
1) Not subject to production test, verified by design/characterization.
ns –
%–
2) The PLL jitter characteristics add to this value according to the application settings. See the PLL jitter
parameters.
3) The PLL jitter is not included in this parameter. If the BFCLKO frequency is equal to fCPU, the K divider has to
be regarded.
tBFCLKO
BFCLKO 0.5 VDDP05
t5
t6
t8
Figure 29 BFCLKO Output Clock Timing
0.9 VDD
t7
0.1 VDD
MCT04883_mod
Data Sheet
160
V1.3, 2014-08