TC1797_14 Datasheet, PDF (11/192 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1797
Introduction
2
Introduction
This Data Sheet describes the Infineon TC1797, a 32-bit microcontroller DSP, based on
the Infineon TriCore Architecture.
2.1
About this Document
This document is designed to be read primarily by design engineers and software
engineers who need a detailed description of the interactions of the TC1797 functional
units, registers, instructions, and exceptions.
This TC1797 Data Sheet describes the features of the TC1797 with respect to the
TriCore Architecture. Where the TC1797 directly implements TriCore architectural
functions, this manual simply refers to those functions as features of the TC1797. In all
cases where this manual describes a TC1797 feature without referring to the TriCore
Architecture, this means that the TC1797 is a direct implementation of the TriCore
Architecture.
Where the TC1797 implements a subset of TriCore architectural features, this manual
describes the TC1797 implementation, and then describes how it differs from the TriCore
Architecture. Such differences between the TC1797 and the TriCore Architecture are
documented in the section covering each such subject.
2.1.1 Related Documentations
A complete description of the TriCore architecture is found in the document entitled
“TriCore Architecture Manual”. The architecture of the TC1797 is described separately
this way because of the configurable nature of the TriCore specification: Different
versions of the architecture may contain a different mix of systems components. The
TriCore architecture, however, remains constant across all derivative designs in order to
preserve compatibility.
This Data Sheets together with the “TriCore Architecture Manual” are required to
understand the complete TC1797 micro controller functionality.
2.1.2 Text Conventions
This document uses the following text conventions for named components of the
TC1797:
• Functional units of the TC1797 are given in plain UPPER CASE. For example: “The
SSC supports full-duplex and half-duplex synchronous communication”.
• Pins using negative logic are indicated by an overline. For example: “The external
reset pin, ESR0, has a dual function.”.
• Bit fields and bits in registers are in general referenced as
“Module_Register name.Bit field” or “Module_Register name.Bit”. For example: “The
Current CPU Priority Number bit field CPU_ICR.CCPN is cleared”. Most of the
Data Sheet
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V1.3, 2014-08