92HD92 Datasheet, PDF (52/306 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD92
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Register
R67(43h)
R68(44h)
R69(45h)
R70(46h)
Name
Remarks
Bit[7]
DMic0InAmpLeftGain
DMic0InAmpRightGain
ADCMuxOutAmpLeftG AMux
ain
MuteL
ADCMuxOutAmpRight AMux
Gain
MuteR
Bit[6]
Bit[5]
Bit[4]
Bit[3]
Bit[2]
Bit[1]
Bit[0]
Defa
ult
DMIC0 DMIC0
InGainL InGainL 00h
1
0
DMIC0 DMIC0
InGainR InGainR 00h
1
0
AMux AMux AMux AMux AMux AMux
OutGain OutGain OutGain OutGain OutGain OutGain 90h
L5
L4
L3
L2
L1
L0
AMux AMux AMux AMux AMux AMux
OutGain OutGain OutGain OutGain OutGain OutGain 90h
R5
R4
R3
R2
R1
R0
Notes:
Table 20. I2C Registers
1 Registers not described in this map should be considered “reserved”.
2.29.2.1. SPKVOL L/R Registers
Speaker (BTL) volume adjustment in Aux Audio Mode (Port D).
This register reset by POR/DAFG/ULR. Writing to NID22h verb 77F will also cause reset.
Register Address
Bit
Label
0x01 / 0x02
verb F71/771 (Left)
verb F72/772 (Right)
7:0
verb 773 (Left and Right -
write only)
VOL[7:0]
Type Default
Description
RW 30
+36 to -91.5dB in 0.75dB steps
0x00 = +36dB
0x01 = +35.25dB
...
0x2F = +0.75dB
0x30 = 0dB
0x31 = -0.75dB
...
0xA9 = -90.75
0xAA to 0xFE = -91.5dB
0xFF = mute
Note: The speaker volume control is intended to be the same volume control as implemented in non Aux Audio mode but is
controlled through the I2C interface rather than the HD Audio Bus.
2.29.2.2. AIC1 Register
Audio Interface (I2S) control in Aux Audio Mode
IDT™ CONFIDENTIAL
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92HD92