92HD92 Datasheet, PDF (19/306 Pages) Integrated Device Technology – SINGLE CHIP PC AUDIO SYSTEM

92HD92
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
2.8. AFG D1
D1 is a lower power mode where all converter widgets are disabled. Analog mixer and port functions
are active. The part will resume from theD1 to theD0 state within 1 mS.
2.9. AFG D2
The D2 state further reduces power by disabling the mixer and port functions. The port amplifiers
and internal references remain active to keep port coupling caps charged and the system ready for a
quick resume to either the D1 or D0 state. The part will resume from the D2 state to the D0 state
within 2mS.
2.10. AFG D3
The D3-default state is available for HD Audio compliance. All converters are shut down. Port ampli-
fiers and references are active but in a low power state to prevent pops. Resume times may be lon-
ger than those from D2, but still less than 10mS to meet Intel low power goals. The default power
state for the Audio Function Group after power is applied is D3.
While in AFG D3, the HD Audio controller may be in a D0 state (HD Audio bus active) or in a D3
state (HD Audio bus held in reset with no Bit_Clk, SData_Out, or Sync activity.) The expected behav-
ior is as follows (see the HDA015-B section for more information):
Function
HDA Bus active
Port Presence Detect state change Unsolicited Response
GPIO state change
Unsolicited Response
HDA Bus stopped
Wake Event followed by an unsolicited response
Wake Event followed by an unsolicited response
2.10.1. AFG D3cold
The D3cold power state is the lowest power state available that does not use vendor specific verbs.
While in D3cold, the CODEC will still respond to bus requests to revert to a higher power state (dou-
ble AFG reset, link reset). However, audio processing, port presence detect, and other functions are
disabled. Per the HD Audio bus HDA015-B, the D3cold state is intended to be used just prior to
removing power to the CODEC. Typically, power will be removed within 200mS. However, the codec
may exit from the D3cold state by generating 2, back-to-back, AFG reset events. Resume time from
D3cold is less than 200mS.
2.11. Vendor Specific Function Group Power States D4/D5
The codec introduces vendor specific power states. A vendor defined verb is added to the Audio
Function Group that combines multiple vendor specific power control bits into logical power states
for use by the audio driver. The 2 states defined offer lower power than the 5 existing states defined
in the HD Audio specification and HDA015-B. The Vendor Specific D4 state provides lower digital
power consumption relative to D3cold by disabling HD Audio link responses. Vendor specific D5 fur-
ther reduces power consumption on the digital supply by turning off GPIO drivers, and reduces ana-
log power consumption by turning off all analog circuitry except for reset circuits.
States D4/D5 are not entered until D3cold has been requested so are actually D3cold options rather
than true, independent, power states. Software can pre-program the D4 or D5 state as a re-definition
of how the part will behave when the D3cold power state is requested or software may enter D3cold,
then set the D4 or D5 before performing the power state get command. The preferred method is to
request D3cold, then select D4 or D5 as desired.This will reduce the severity of pops encountered
when entering D4 or D5.
IDT CONFIDENTIAL
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92HD92