CA91L8260B Datasheet, PDF (407/439 Pages) Integrated Device Technology – PowerSpan II™ User Manual

15. AC Timing
407
Table 106: Miscellaneous Timing Parameters
Timing
Parameter
Description
Interrupt Timing
t₄₀₀
t₄₀₁
t₄₀₂
t₄₀₃
t₄₀₄
I²C Timing
Float to active delay
Active to float delay
Input setup time
Input hold time
Pulse width
t₄₁₀
I2C_SCLK period
t₄₁₁
I2C_SCLK high time
t₄₁₂
I2C_SCLK low time
t₄₁₃
STOP condition setup time
t₄₁₄
Bus free time
t₄₁₅
START condition setup time
t₄₁₆
START condition hold time
t₄₁₇
Data output valid time
t₄₁₈
Data output hold time
t₄₁₉
Data sample time
CE/IE
Min Max
Units
Note
2
15
ns
1
2
15
ns
1
3
ns
2
0.5
ns
2
4
PB_CLKs
3
1024 1024 PB_CLKs
512 512 PB_CLKs
512 512 PB_CLKs
512 512 PB_CLKs
512
PB_CLKs
1024
PB_CLKs
512 512 PB_CLKs
256 256 PB_CLKs
256 256 PB_CLKs
256 256 PB_CLKs
1. Numbers measured into 35 pF load.
2. PowerSpan II synchronizes these inputs before using them. This parameter must be met for deterministic response time.
3. PowerSpan II filters these inputs to ensure spurious low going pulses are not recognized as active interrupts. An interrupt pin is considered valid
if three PB_CLK samples yield the same result.
Integrated Device Technology
www.idt.com
PowerSpan II User Manual
80A1010_MA001_09