CA91L8260B Datasheet, PDF (363/439 Pages) Integrated Device Technology – PowerSpan II™ User Manual

12. Register Descriptions
363
12.5.67 I2O Inbound Free List Top Pointer Register
Register Name: IFL_TOP
Register Offset: 0x514
PCI
Bits
31-24
23-16
15-08
07-00
PB_I2O_BS
TOP
Function
PB_I2O_BS
TOP
TOP
0
PB
Bits
0-7
8-15
16-23
0
24-31
Name
PB_I2O_BS
[11:0]
TOP [17:0]
Type
R
R/W
Reset
By
PRI_RST
PRI_RST
Reset
State
0
Function
Processor Bus I2O Base Address
0
Inbound Free List Top Pointer
This pointer gives the address offset for the Inbound
Free List Top Pointer from PB_I2O_BS.
TOP: This pointer gives the address offset for the Inbound Free List Top Pointer from PB_I2O_BS.
This pointer is initialized by the IOP and can be incremented by four by writing a 1 to the INCR bit in
the “Inbound Free List Top Pointer Increment Register” on page 364.
If the initial values of the Inbound Free List Bottom and Top pointers are the
same, the inbound free list is empty. The user can program the Top pointer to be
four less than the Bottom pointer and then set the INCR bit in the “Inbound Free
List Top Pointer Increment Register” on page 364 register to make the inbound
free list full.
Integrated Device Technology
www.idt.com
PowerSpan II User Manual
80A1010_MA001_09