CA91L8260B Datasheet, PDF (175/439 Pages) Integrated Device Technology – PowerSpan II™ User Manual

9. Resets, Clocks and Power-up Options
175
9.3.2
9.3.3
Configuration Slave Mode
When there is a 60x bus device with the capability to be a configuration master in a PowerSpan II
system (for example the PowerQUICC II) the Configuration Slave mode overrides the default
power-up option — the Multiplexed System Pins mode. The slave mode’s power-up options overwrite
the multiplex system pin mode power-up options that were sampled at PO_RST_ (see Figure 22).
When the PowerQUICC II is the configuration master, it asserts one of the A[0:6] signals when the
HRESET_ signal is low. Refer to the MPC8260 (PowerQUICC II) User Manual for a detailed
description of configuration master functionality.
PowerSpan II acts as a configuration slave under the following conditions:
• PB_RSTCONF_ is connected to one of the configuration master’s A[0:6] lines
• PB_RST_ is connected to the configuration master HRESET_ signal
• PB_D is connected to the processor bus data line
The configuration slave power-up options are configured by PB_D as defined in Table 45. PowerSpan
II configuration slave mode timing is illustrated in Figure 23.
Figure 23: PowerSpan II Configuration Slave Mode Timing
PB_RST_
PB_D[0:7]
Configuration Word
PB_RSTCONF_
Power-up Options Configured
The configuration master updates all configuration slaves for each HRESET_ sequence. PowerSpan II
updates its the same configuration word accordingly after each sequence.
Assertion of P1_REQ64#
When PowerSpan II is used as the Central Resource in the system and controls both P1_REQ64# and
P1_RST#, the PWRUP_P1_REQ64_EN bit must be set to 1 in the “Reset Control and Status Register”
on page 324. However, PowerSpan II does not assert P1_REQ64# signal until its configuration word is
latched. In order to meet this requirement, PowerSpan II must not be the last four configuration slaves
(PowerQUICC II can support up to seven external configuration slaves). By meeting these
requirements, PowerSpan II ensures that the timing parameters for a 64-bit data width are satisfied.
Integrated Device Technology
www.idt.com
PowerSpan II User Manual
80A1010_MA001_09