English
Language : 

IC-MU_17 Datasheet, PDF (9/66 Pages) IC-Haus GmbH – MAGNETIC OFF-AXIS POSITION ENCODER - POLE WIDTH 1.28MM
iC-MU MAGNETIC OFF-AXIS
POSITION ENCODER - POLE WIDTH 1.28MM
Rev D1, Page 9/66
ELECTRICAL CHARACTERISTICS
Operating conditions: VPD = VPA = 5 V ±10%, Tj = -40. . . 125°C, IBP calibrated to 200 µA, reference is VNA = VND,
unless otherwise stated
Item Symbol Parameter
No.
Conditions
Min. Typ.
503 GX
Adjustable Gain(SIN)/Gain(COS) GX_x = 0x00
GX_x = 0x3F
GX_x = 0x7F
0
9
10
-9
504 VOS
Adjustable Offset Calibration
VOS_x = 0x3F
VOS_x = 0x7F
60
70
-70
505 PHM
Adjustable Phase Calibration
Master Track
PH_M = 0x3F
PH_M = 0x7F
6
7
-7
506 PHN
Adjustable Phase Calibration
Nonius Track
PH_N = 0x3F
PH_N = 0x7F
11.25 13
-13
507 Vampl
Signal Level Controller
chip internally, Vampl =
Vpp(PSINx)+Vpp(NSINx), ENAC = 1
3.2
4
508 Vae()lo Signal Monitoring Threshold lo Vae()lo = Vpp(PSINx)+Vpp(NSINx)
1.2
509 Vae()hi Signal Monitoring Threshold hi Vae()hi = Vpp(PSINx)+VPP(NSINx)
5
Sine-To-Digital Conversion
601 Aabs
Absolute Angular Accuracy
ideal input signals, reference to 12 Bit of sine
period
602 Arel
Relative Angular Accuracy
FILT = 0x2
FILT = 0x7
ideal input signals, reference to 12 Bit of sine
period, f = 1 KHz
Nonius Calculation
701 Pnon
Permissible Track deviation
Master vs. Nonius
16 periods, MPC = 0x4
32 periods, MPC = 0x5
64 periods, MPC = 0x6
referenced to 360° of Master sine period
Digital Output Port PA1..3, MTC, SCL, SDA
801 Vs()hi
Saturation Voltage hi Pins PA1..3, Vs()hi = V(VPD) - V(), I() = -4 mA
MTC
802 Vs()lo
Saturation Voltage lo
I() = 4 mA versus VND
803 Isc()hi
Short-Circuit Current hi Pins
PA1..3, MTC
V() = V(VND), 25 °C
-90 -50
804 Isc()lo
Short-Circuit Current lo
V() = V(VPD), 25 °C
50
805 tr()
Rise Time
CL = 50 pF
806 tf()
Fall Time
CL = 50 pF
807 Ilk(PA3) Leakage Current at PA3
MODEA=0, PA0 = hi
-5
808 f(SCL) Frequency at SCL
normal mode
80
during start-up
70
Digital Input Port PA0..2, MTD, SCL, SDA
901 Vt()hi
Threshold Voltage hi
902 Vt()lo
Threshold Voltage lo
0.8
903 Vt()hys Hysteresis
Vt()hys = Vt()hi - Vt()lo
150
904 Ipu()
Pull-Up Current Pins PA0..2,
MTD
V() = 0 V . . . V(VPD)-1 V
-60 -30
905 Ipu()
Pull-Up Current Pins SCL, SDA V() = 0 V . . . V(VPD)-1 V
-800 -300
906 f()
Permissible Input Frequency
Analog/Digital Output Port PB0..3
A01 I()buf
Analog Driver Current
-1
A02 fg()ana Analog Bandwidth
100
A03 Isc()hi,ana Analog Short-Circuit Current hi V() = V(VND)
A04 Isc()lo,ana Analog Short-Circuit Current lo V() = V(VPD)
1.5
A05 Rout(),ana Output Resistor, Analog Mode I() = 1 mA
A06 Vs()hi,dig Digital Saturation Voltage hi
Vs() = V(VPD) - V(), I() = -4 mA
A07 Vs()lo,dig Digital Saturation Voltage lo
I() = 4 mA
A08 Isc()hi,dig Short-Circuit Current hi
V() = V(VPD)
-60 -35
Max.
-8.5
-60
-6
-11.25
4.8
2.8
6.3
2
2
1/4
10
5
2.5
0.4
0.4
90
60
60
5
2
-6
-80
10
1
-1.5
500
0.5
0.5
Unit
%
%
%
mV
mV
°
°
°
°
Vpp
Vpp
Vpp
LSB
LSB
LSB
DEG
DEG
DEG
V
V
mA
mA
ns
ns
µA
kHz
kHz
V
V
mV
µA
µA
MHz
mA
kHz
mA
mA
Ω
V
V
mA