IC-MU_17 Datasheet, PDF (54/66 Pages) IC-Haus GmbH – MAGNETIC OFF-AXIS POSITION ENCODER - POLE WIDTH 1.28MM

iC-MU MAGNETIC OFF-AXIS
POSITION ENCODER - POLE WIDTH 1.28MM
Overview Register access: memory mapping, Register protection levels
BiSS/SPI
0x00
0x3F
0x40
0x41
0x42
0x43
0x44
0x47
0x48
0x51
0x52
0x59
0x5A
0x77
0x78
0x7D
0x7E
0x7F
n=0
selects
n = 16
RAM
0x00 ^{Configuration}
0x18 ^Data
0x19
0x1D
reserved
0x1E
0x1F
OFF_ABZ
0x20
0x24
reserved
0x25 PA0_CONF
0x26
0x3F
reserved
Bank Selection  n
0x41 ^EDSBANK
0x42
0x43
PROFILE_ID
0x44
0x47
SERIAL
0x48 OFF_ABZ/OFF_UVW
0x51 ^PRES_POS
0x52
0x59
SPO_x
0x5A Special MU registers
0x77 ^{CMD, Status}
0x78
0x7D
0x7E
ROM
0x7F
EEPROM Bank 0
0x00 Configuration
0x18 Data
1a
0x19
0x20
SPO_x
0x21
0x22
CRC16
1c
0x23 OFF_ABZ/OFF_UVW
0x2E ^PRES_POS
2a
0x2F CRC8
2b
0x30 PA0_CONF
0x31 EDSBANK
0x32
0x33
PROFILE_ID
0x34
0x37
SERIAL
1b
0x38
0x3D
DEV_ID
0x3E
0x3F
MFG_ID
CRC-build sequence
0x040
0x07F
Bank 1
...0x0FF Bank ...3
...0x13F Bank ...4
0x140
0x17F
Bank 5
...0x3FF Bank ...15
0x400
0x43F
Bank 16
...0x7FF Bank ...31
Figure 48: Register access with memory mapping
Rev D1, Page 54/66
Register Protection
RP0
RP1
CONF: Bank 0
R/W
n/a
STATIC: 0x41...0x7F
R/W
R
CONF:n/a
special:r/w
EDS: Bank 1...4
R/W
R
USER: Bank 5...31
R/W
R/W