IC-MU_17 Datasheet, PDF (30/66 Pages) IC-Haus GmbH – MAGNETIC OFF-AXIS POSITION ENCODER - POLE WIDTH 1.28MM

iC-MU MAGNETIC OFF-AXIS
POSITION ENCODER - POLE WIDTH 1.28MM
BiSS C Interface
Rev D1, Page 30/66
0 0 ERR WRN
Zero bits
busy
tos
cycle
Figure 15: Example of BiSS line signals
MODEA
Code
0x2
Description
BiSS-C
Table 40: MODEA: BiSS
The BiSS C interface serial bit stream is binary coded.
The error and warning bit is low active. Transmission
of sensor and register data is implemented. iC-MU
needs no processing time, therefore t_busy is one mas-
ter clock cycle. For further information regarding the
BiSS-C-protocol visit www.biss-interface.com.
A communication frame ends when the MA pin clock
cycles stop. After the last edge on MA the communi-
cation timeout begins. The timeout is adaptive and the
timeout period t_out is calculated based on the first MA
edges as shown in Figure 4.
In BiSS protocol iC-MU uses fixed CRC polynomials,
see Table 41. The single cycle data (SCD), i.e. the
primary data which is newly generated and completely
transmitted in each cycle, contains the position data (op-
tional multiturn + singleturn) and the error and warning
bit. The CRC value is output inverted.
data-
channel*)
SCD
(sensor)
CDM, CDS
(register)
Note:
CRC
HEX Code
0x43
0x13
Polynomial
x⁶+x¹+x⁰
x⁴+x¹+x⁰
*) explanation s. BiSS-C specification
Table 41: BiSS CRC polynomials