IC-MHM Datasheet, PDF (58/63 Pages) IC-Haus GmbH – 14-BIT ABSOLUTE ANGLE HALL ENCODER

iC-MHM
14-BIT ABSOLUTE ANGLE HALL ENCODER
Rev D1, Page 58/63
Operation
As shown in green in Figure 43, during normal opera-
tion, the singleturn position (angle) and multiturn count
is constantly updated and available over the serial in-
terface and the incremental outputs (if enabled). The
internal multiturn count is also verified against the exter-
nal multiturn sensor on a periodic basis. If the counts
disagree, ERR_MT in the error status register is set, the
error output is activated (NERR = 0), and the error bit in
the BiSS SCD, SPI position read command response,
and extended SSI frame are activated (nERR = nE = 0).
After every BiSS or SSI cycle, the validity of the config-
uration parameters and offset data in RAM is verified
using CRCs. If either CRC fails, the appropriate error
bit in the error status register is set, the error output is
activated (NERR = 0), and the error bit in the BiSS SCD,
SPI position read command response, and extended
SSI frame are activated (nERR = nE = 0). Refer to STA-
TUS REGISTERS on page 30 for more information.
Position Preset Sequence
The position preset sequence is shown in orange in
Figure 43. In response to a preset instruction (0x74 =
2), BiSS command 3, or the dedicated preset input (if
configured), new position offset values are calculated
based on the position preset values in EEPROM and
the current absolute position of the magnet. A CRC is
done on the preset values and the chip is reset if the
CRC fails. Refer to POSITION OFFSET AND PRESET
(Zero Position) on page 55 for more information.
During the absolute position preset sequence, the po-
sition is not available. If requested, a zero value is
returned. In addition, the error and warning bits in the
BiSS SCD, SPI position read command response, and
extended SSI frame are active (nERR = nWARN = nE =
nW = 0).