IC-MHM Datasheet, PDF (5/63 Pages) IC-Haus GmbH – 14-BIT ABSOLUTE ANGLE HALL ENCODER

iC-MHM
14-BIT ABSOLUTE ANGLE HALL ENCODER
PACKAGING INFORMATION
Rev D1, Page 5/63
PIN CONFIGURATION QFN28-5x5
28 27 26 25 24 23 22
1
21
2
20
3
19
4
<P-CODE>
18
5
<A-CODE>
17
6
<D-CODE>
16
7
15
8 9 10 11 12 13 14
PIN FUNCTIONS
No. Name Function
1 MA ⁴ BiSS/SSI Clock Input,
SPI Clock Input (SCLK)
2 NMA ⁴ BiSS/SSI Clock Input, inverted
3 NSIN Analog Sine Output, inverted
4 PSIN Analog Sine Output
5 P1 Digital I/O 1, Preset Input
PIN FUNCTIONS
No. Name Function
6 P2
Digital I/O 2,
Code Direction Input
7 P3
Digital I/O 3, BiSS Output
8 n.c.¹
9 NCS SPI Enable and Chip Select
Input (active low)
10 MCL Multiturn SSI Clock Output,
Digital Output 0
11 MDI Multiturn SSI Data Input,
Digital Input 0
12 NERR Error Input/Output (active low)
13 SCL I²C Clock
14 SDA I²C Data
15 n.c.
16 GNDS ⁵ Switched GND
(reverse polarity protected)
17 VDDS ⁵ Switched VDD
(reverse polarity protected)
18 PCOS Analog Cosine Output
19 NCOS Analog Cosine Output, inverted
20 NSLI ^{2, 4} BiSS Data Input, inverted
21 SLI ^{2, 4} BiSS Data Input
SPI Data Input (MOSI)
22 NSLO ⁴ BiSS/SSI Data Output, inverted
23 SLO ⁴ BiSS/SSI Data Output
SPI Data Output (MISO)
24 VDD ⁴ +5 V Supply Voltage Input
25 n.c.
26 GND ⁴ Ground
27 NMAO ⁴ BiSS Clock Output, inverted
28 MAO ⁴ BiSS Clock Output
BP ³ Backside Paddle
IC top marking: <P-CODE> = product code, <A-CODE> = assembly code (subject to changes), <D-CODE> = date code (subject to changes);
1 _{Pins marked n.c. are not connected.}
2 _{Must be externally biased as shown in Figures 19 and 20.}
3 _{Connection of the backside paddle to GNDS by a single trace is recommended. Current flow across the paddle is not permissible.}
4 _{Protect against transient voltages as shown in Figure 8.}
5 _{A bypass capacitor of at least 100 nF between and close to these pins is recommended.}