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IC-MHM Datasheet, PDF (24/63 Pages) IC-Haus GmbH – 14-BIT ABSOLUTE ANGLE HALL ENCODER
iC-MHM
14-BIT ABSOLUTE ANGLE HALL ENCODER
Rev D1, Page 24/63
fsys is the system clock frequency (Elec. Char. item
no. 501). In general, use the fastest clock frequency
supported by the external multiturn sensor to minimize
transmission time.
Multiturn Resolution (RESO_MT)
The number of multiturn bits expected by the iC-MHM
from the external multiturn counter and the length of
the iC-MHM’s internal multiturn counter is determined
by parameter RESO_MT.
RESO_MT
Value
0
1
2
3
4
5
6
7
Address 0x01; bits 2:0
Resolution (Bits)
0 (Multiturn counter not used)
4
8
12
16
20
24
32
Table 23: Multiturn Resolution
The amount of phase advance required depends on the
number of synchronization bits used as shown in Table
24.
SBL_MTI
Value
0
1
2
3
4
5
6
7
Address 0x02; bits 3:1
Sync Bits
Phase
Advance
Multiturn Interface Disabled
1
-90 °
2
-135 °
3
-157.5 °
4
-168.75 °
5
-174.375 °
Reserved (Do not use)
Reserved (Do not use)
Tolerance
± 90 °
± 135 °
± 157.5 °
± 168.75 °
± 174.375 °
Table 24: Multiturn Synchronization Bits
The tolerances shown in Table 24 are the maximum
rotation allowed during the time for the multiturn count
to be transmitted from the external multiturn sensor to
the iC-MHM. This value must also take into account
the mechanical misalignment of the two sensors due to
assembly variations.
Any RESO_MT value may be used in BiSS or SSI
mode, but only certain values can be used in SPI mode.
Refer to Table 94 on page 48 for more information. In
all cases, the number of bits supplied by the external
multiturn counter must match the RESO_MT value. If
the multiturn counter is not needed, set RESO_MT = 0.
Multiturn Synchronization Bits (SBL_MTI)
To guarantee correct multiturn synchronization up to
five synchronization bits can be used. Synchronization
bits are the MSBs of the singleturn position and indicate
the position of the multiturn sensor within a single turn.
When one synchronization bit is used, the position of
the multiturn sensor is known to 180°. When two bits
are used, the position of the multiturn sensor is known
to 90°, etc.
When the multiturn count (including synchronization
bits) is read from the external multiturn sensor, the syn-
chronization bits are compared to the corresponding
bits of the iC-MHM singleturn position. If necessary, the
multiturn count read in is corrected by subtracting one
turn to provide correct synchronization.
Because the iC-MHM can only decrement the multiturn
count read from the SSI multiturn interface, the multi-
turn sensor must be mounted (or programmed) with a
phase advance relative to the iC-MHM. In other words,
the 0° point of the multiturn sensor must occur before
the 0° point of the iC-MHM with positive rotation.
Exceeding these tolerance values at startup results in
a wrong multiturn count being used in the iC-MHM. Ex-
ceeding these values during operation sets ERR_MT
in the error status register. This activates the error out-
put (pin NERR low) and activates the error bit in the
BiSS SCD, SPI position read command response, and
extended SSI frame (nERR = nE = 0). Refer to STA-
TUS REGISTERS on page 30 for more information on
errors.
The amount of time to transmit the multiturn count from
the external multiturn sensor to the iC-MHM, tSSI, is
calculated as
8(CF_MTI+1)
tSSI = fsys · (RESO_MT + SBL_MTI + EBL_MTI)
Where fsys is the system clock frequency (Elec. Char.
item no. 501) and tout is the SSI slave timeout (Elec.
Char. item no. I006).
For example, for 24 multiturn bits (RESO_MT = 6),
one synchronization bit (SBL_MTI = 1), one error bit
fsys
(EBL_MTI = 1), and an SSI clock frequency of
64
(CF_MTI = 1),
8(1+1)
tSSI = 11 500 000 · (24 + 1 + 1) = 145 µs
The magnet rotation angle during this time, θSSI, is cal-
culated as
θSSI
[◦]
=
Magnet
Speed
60
[RPM]
·
tSSI
·
360◦