IC-MHM Datasheet, PDF (16/63 Pages) IC-Haus GmbH – 14-BIT ABSOLUTE ANGLE HALL ENCODER

iC-MHM
14-BIT ABSOLUTE ANGLE HALL ENCODER
REGISTER MAP: RAM
Rev D1, Page 16/63
OVERVIEW
Addr
Bit 7
Bit 6
Bit 5
Interpolator
0x00
HYS
DIR
0x01
0
RESO_ST
Multiturn Interface
0x02
GET_MTI
EBL_MTI
Serial Interface
0x03
ENSSI
EXT_SSI
BIN_SSI
Signal Conditioning
0x04
ENF
0x05 HARMCAL(4)
0x06
HARMCAL(3:0)
0x07
0
NTOA
DISBISS
0x08
GAINR
0x09
ENAC
Safety
0x0A
0
ENLC
Enable
0x0B
0
ENCMD01 ENCMD2
CRC
0x0C
Output Offset and CRC
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
Bank Selection
0x40
I2CDEV
Status Registers (read only)
0x70
ERR_MT
ERR_MTI ERR_AMAX
0x71
0
0
0
0x72
0x73
Instruction Registers
0x74
0
0
0
0x75
0
0
0
0x76
0x77
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TLF
AVGFILT
0
RESO_MT
SBL_MTI
CF_MTI
RTX_MODE
MT12
CFG_IOP
VOSS
VOSC
CIBM
TEST
GAINF
GCC
CRCS
ENCMD3
DIR_IO2
PRES_IO1 INSPROT REGPROT
CRC_CFG
OFFS_MT(31:24)
OFFS_MT(23:16)
OFFS_MT(15:8)
OFFS_MT(7:0)
OFFS_ST(15:8)
OFFS_ST(7:0)
CRC_OFFS
BSEL
ERR_AMIN ERR_EXT
0
S_IO3
GAIN
CHIP_REL*
ERR_POS
S_IO2
ERR_OFFS ERR_CFG
S_IO1
S_IO0 (MDI)
0
0
0
F_IO3
GAIN
Reserved (do not use)
0
F_IO2
PRESET
F_IO1
RESET
F_IO0 (MCL)
*Undefined for chip revisions prior to X5
Table 7: Register layout