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IC-MHM Datasheet, PDF (53/63 Pages) IC-Haus GmbH – 14-BIT ABSOLUTE ANGLE HALL ENCODER
iC-MHM
14-BIT ABSOLUTE ANGLE HALL ENCODER
Rev D1, Page 53/63
setting the chip as explained above, ERR_CFG = 1,
ERR_OFFS = 1, the error output is still active (pin
NERR low), and the error bit in the BiSS SCD, SPI
position read command response, and extended SSI
frame are still active (nERROR = nE = 0) since the CRC
tests fail because the configuration and offset check-
sums (CRC_CFG and CRC_OFFS, respectively) have
not been configured. However, SLO is released and the
remainder of the configuration parameters can be writ-
ten using full bidirectional BiSS communication while
ignoring the errors.
Once all the configuration parameter values have
been written, the configuration and offset checksums
(CRC_CFG and CRC_OFFS, respectively) must be cal-
culated and stored in RAM. Please use therefore CR-
C-Polynomial = 100011101 and start value = 2. A sam-
ple C++ CRC checksum calculation routine is shown
following.
Example of CRC Calculation Routine
With the checksums stored, the iC-MHM has to be reset
by writing Address (0x74 = 1).
If an EEPROM is connected to the iC-MHM (refer
to EEPROM AND I2C INTERFACE on page 33), the
complete configuration (including checksums) must
be written to it for use on subsequent start ups.
Write the configuration data in RAM addresses 0x00
- 0x13 to EEPROM addresses 0x10 - 0x23 byte by
byte using BiSS register write commands. Refer to
the BiSS Interface Protocol Description (C-Mode) at
www.biss-interface.com for more information on BiSS
register communication.
If a position preset command or enabled preset input
P1 is required by the application, a value for the preset
position and its checksum must also be written to the
EEPROM as part of iC-MHM configuration. Write the
desired preset position and its checksum to EEPROM
addresses 0x48 - 0x4E byte by byte using BiSS reg-
ister write commands. Refer to POSITION OFFSET
AND PRESET (Zero Position) on page 55 for more
information.
unsigned char Reg[20] = {0x44, 0x47, 0x10, 0x1A,
0x80, 0x00, 0x10, 0x00, 0x03, 0x80, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00};
int iCRCPoly = 0x11D; // CRC-Polynomial 100011101
unsigned char ucDataStream = 0;
unsigned char ucCRC;
// Calculate Config-CRC //
ucCRC = 2; // startvalue !!!
for (int iReg = 0 ; iReg<12; iReg ++) {
ucDataStream = Reg[iReg];
for (int i =0; i <=7; i ++) {
if ( (ucCRC & 0x80) != (ucDataStream & 0x80))
ucCRC = (ucCRC << 1 ) ^ iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream = ucDataStream << 1 ;
}
}
Reg[12] = ucCRC;
When writing to the EEPROM, a wait time of at least
4 ms must be allowed after each write. Alternatively, the
same byte can be read back after it is written and the
values compared. This comparison will fail if the EEP-
ROM is busy with its internal write procedure. Several
attempts may be required for the read value to equal
the written value before the next location can be written.
SPI Mode Configuration
In SPI mode, use Register Write (Continuous) com-
mand to write all configuration parameters and then
reset the iC-MHM. Refer to SERIAL INTERFACE: SPI
Mode on page 46 for more information.
// Calculate Offset-CRC //
ucCRC = 2; // startvalue !!!
for (int iReg = 13 ; iReg<19; iReg ++) {
ucDataStream = Reg[iReg];
for (int i =0; i <=7; i ++) {
if ( (ucCRC & 0x80) != (ucDataStream & 0x80))
ucCRC = (ucCRC << 1 ) ^ iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream = ucDataStream << 1 ;
}
}
Reg[19] = ucCRC;