IC-MU_13 Datasheet, PDF (48/59 Pages) IC-Haus GmbH – OFF-AXIS NONIUS ENCODER WITH INTEGRATED HALL SENSORS

iC-MU OFF-AXIS NONIUS ENCODER
WITH INTEGRATED HALL SENSORS
preliminary
Static part: Addresses 0x40-0xBF
Addr.
SER
Bit 7
Bit 6
Bit 5
0x7C
0x7D
0x7E
0x7F
0x80
...
0xBF
Bit 4
Bit 3
Bit 2
REVISION(39:32)
REVISION(47:40)
MANUFACTURER(7:0)
MANUFACTURER(15:8)
RESERVED
Rev B1, Page 48/59
Bit 1
Bit 0
Table 86: Register mapping bank 0-31, addresses 0x40-0xBF (access via serial interface)
The current iC-MU hardware version can be read out
through HARD_REV.
HARD_REV(7:0) Addr. SER: 0x74; bit 7:0
Code
Chip version
Addressing scheme
using banks
0x02
iC-MU 0
-
0x03
iC-MU 1
-
0x04
iC-MU Z
-
0x05
iC-MU Y
x
0x06
iC-MU Y1
x
Table 87: HARD_REV