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IC-MU_13 Datasheet, PDF (22/59 Pages) IC-Haus GmbH – OFF-AXIS NONIUS ENCODER WITH INTEGRATED HALL SENSORS | |||
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iC-MU OFF-AXIS NONIUS ENCODER
WITH INTEGRATED HALL SENSORS
preliminary
I2C INTERFACE AND STARTUP BEHAVIOR
Rev B1, Page 22/59
I2C interface / CRC
The multimaster-I2C interface enables read and write
access to a serial EEPROM which uses an address-
ing scheme equal to an 24C01 EEPROM (e.g. 24C02,
256 bytes, 5V type with a 3.3V function).
CRC8(7:0)
CRC8(7:0)
Code
...
Notes:
Addr. 0x2F; bit 7:0
Addr. SER: no access;
Meaning
CRC formed with CRC polynomial 0x197*)
*) x8 + x7 + x4 + x2 + x1 + 1, start value 0x1
The conï¬guration data in the EEPROM in address
range 0x00 to 0x20 and 0x30 to 0x3F is checked with
a 16 bit CRC (CRC16). The start value for the CRC16
calculation is 1.
CRC16(7:0)
Addr. 0x21; bit 7:0
CRC16(15:8)
Addr. 0x22; bit 7:0
CRC16(15:0)
Addr. SER: no access;
Code
Meaning
...
CRC formed with CRC polynomial 0x11021*)
Notes:
*) x16 + x12 + x5 + 1, start value 0x1
This is equivalent to CRC-CCITT/CRC-16
Table 24: EEPROM data checksum
The offset and preset position for iC-MUâs preset se-
quence is not part of the conï¬guration data area. The
data is located in address range 0x23 to 0x2E of the
EEPROM and is checked separately with a 8-bit CRC
(CRC8). The start value for the CRC8 calculation is 1.
Table 25: Offset/preset data checksum
iC-MU calculates CRC8 and CRC16 automatically
when writing the conï¬guration to the EEPROM. The
serial interface does not allow to access the CRC8
and CRC16 values. CRC16 and CRC8 are checked on
startup. A cyclic check during operation can be conï¬g-
ured with NCHK_CRC. With the command CRC_VER
(s. Tab. 97) a CRC check can be explicitly requested.
An error is signaled by status bit CRC_ERR.
NCHK_CRC
Addr. 0x0D; bit 6
Code
Meaning
0
cyclical CRC check of CRC16 and CRC8
1
no cyclical CRC check
Table 26: Zyclic CRC check
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