IC-MU_13 Datasheet, PDF (16/59 Pages) IC-Haus GmbH – OFF-AXIS NONIUS ENCODER WITH INTEGRATED HALL SENSORS

iC-MU OFF-AXIS NONIUS ENCODER
WITH INTEGRATED HALL SENSORS
preliminary
REGISTER ASSIGNMENTS (EEPROM)
Rev B1, Page 16/59
scope of eeprom register view
access
via
ADDR
EEPROM
SPI
BiSS
SSI
iC-MU
N.B.:
ADDR is used in register tables to
indicate the address of the
corresponding parameter. If the
addressing scheme differs
between the EEPROM and the
serial interface ADDR. SER is
used to indicate the addressing
through the serial interface.
Figure 8: Scope of register mapping EEPROM
Register assignment (EEPROM)
OVERVIEW
Addr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Signal Conditioning
0x00
GC_M(1:0)
0x01
0x02
0x03
0x04
0x05
ENAC
0x06
GC_N(1:0)
0x07
0x08
0x09
0x0A
GF_M(5:0)
GX_M(6:0)
VOSS_M(6:0)
VOSC_M(6:0)
PH_M(6:0)
GF_N(5:0)
GX_N(6:0)
VOSS_N(6:0)
VOSC_N(6:0)
PH_N(6:0)
CIBM(3:0)
Digital Parameters
0x0B
MODEB(2:0)
MODEA(2:0)
0x0C
CFGEW(7:0)
0x0D
ACC_STAT NCHK_CRC NCHK_NON ACRM_RES
EMTD(2:0)
0x0E
ESSI_MT(1:0)
ROT_MT
LIN
FILT(2:0)
0x0F
SPO_MT(3:0)
MPC(3:0)
0x10
GET_MT
CHK_MT
SBL_MT(1:0)
MODE_MT(3:0)
0x11
OUT_ZERO(2:0)
OUT_MSB(4:0)
0x12
GSSI
RSSI
MODE_ST(1:0)
OUT_LSB(3:0)
0x13
RESABZ(7:0)
0x14
RESABZ(15:8)
0x15
ROT
SS_AB(1:0)
ENIF_AUTO
FRQAB(2:0)
0x16
LENZ(1:0)
CHYS_AB(1:0)
PP60UVW
INV_A
INV_B
0x17
RPL(1:0)
PPUVW(5:0)
TEST
0x18
TEST(7:0)
TRACK-OFFSET
0x19
0x1A
SPO_0(3:0)
SPO_2(3:0)
SPO_BASE(3:0)
SPO_1(3:0)
Bit 0
INV_Z