IC-MU_13 Datasheet, PDF (34/59 Pages) IC-Haus GmbH – OFF-AXIS NONIUS ENCODER WITH INTEGRATED HALL SENSORS

iC-MU OFF-AXIS NONIUS ENCODER
WITH INTEGRATED HALL SENSORS
preliminary
Rev B1, Page 34/59
The master first transmits the Write REGISTER (sin-
gle) command and then address ADR and the data
(DATA). The slave immediately outputs the command,
address, and data at MISO.
The master transmits the REGISTER status/data op-
code. The slave immediately passes the opcode on to
MISO. The slave then transmits the SPI-STATUS byte
and a DATA byte.
NCS
SCLK
MOSI
MISO
OP ADR DATA
OP ADR DATA
8 cycles
Figure 25: Write REGISTER (single); set
WriteAddress and Data
Following the commands Read REGISTER (single)
and Write REGISTER (single), the validity of the DATA
byte is signaled with the VALID status bit.
The requested data byte is returned via DATA following
the Read REGISTER (single) command. Following
the Write REGISTER (single) command, the data to
be written is repeated in the DATA byte. With all other
opcodes, the DATA byte is not defined.
Using the REGISTER status/data command, the
master can poll to the end of communication (signaled
via the SPI-STATUS byte ).
NCS
SCLK
MOSI
MISO
OP
OP STATUS DATA
SPI interface: Command REGISTER status/data
8 cylces
The REGISTER status/data command can be used to
request the status of the last register communication
and/or the last data transmission. The SPI-STATUS
byte contains the information summarized in Table 46.
Figure 26: REGISTER status/data
Figure 27 shows the interaction of the commands
REGISTER read/write and REGISTER status/data.
SPI-STATUS
Bit
Name
Description of the status
report
7
ERROR
Opcode not
implemented, Sensor
data was invalid on
readout
6..4
-
Reserved
Statusbits of the register communication
3
DISMISS
Address refused
2
FAIL
Data request has failed
1
BUSY
Slave is busy with a
request
0
VALID
DATA is valid
Note
Display logic: 1 = true, 0 = false
Table 46: Communication status byte
All SPI status bits are updated with each register ac-
cess. The exception to the rule is the ERROR bit; this
bit indicates whether an error occurred during the last
SPI-communication with the slave.
REGISTER
read/write
(single)
yes
DATA valid
or written
REGISTER
status/data
yes
(BUSY == 1)?
(VALID == 1)?
yes
(FAIL == 1)?
(DISMISS == 1)?
(ERROR == 1)?
yes
error
handling
Figure 27: Example sequence of commands REG-
ISTER read/write and REGISTER sta-
tus/data