HMT164U6AFP6C-S6 Datasheet, PDF (45/57 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

HMT164U6AFP(R)6C
HMT112U6(7)AFP(R)8C
HMT125U6(7)AFP(R)8C
Table 9 — IDD7 Pattern for different Speed Grades and different tRRD, tFAW conditions
Speed Bin Org. tFAW tFAW tRRD tRRD
IDD7 Pattern^a
Mb/s
[ns] [CLK] [ns] [CLK] (Note this entire sequence is repeated.)
all x4/x8 40
16
10
800
all
x16
50
20
10
4
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D A4
RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D
4 D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D
DDDD
all x4/x8 37.5 20
7.5
1066
all
x16
50
27
10
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D
4 D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D
DDDD
A0 RA0 D D D D A1 RA1 D D D D A2 RA2 D D D D A3
6 RA3 D D D D D D D A4 RA4 D D D D A5 RA5 D D D D
A6 RA6 D D D D A7 RA7 D D D D D D D
all x4/x8 30
1333
all
x16
45
20
6
30
7.5
A0 RA0 D D A1 RA1 D D A2 RA2 D D A3 RA3 D D D D
4 D D A4 RA4 D D A5 RA5 D D A6 RA6 D D A7 RA7 D D
DDDD
A0 RA0 D D D A1 RA1 D D D A2 RA2 D D D A3 RA3 D
5 D D D D D D D D D D D D A4 RA4 D D D A5 RA5 D D
D A6 RA6 D D D A7 RA7 D D D D D D D D D D D D D
all x4/x8 30
1600
all
x16
40
24
6
32
7.5
A0 RA0 D D D A1 RA1 D D D A2 RA2 D D D A3 RA3 D
5 D D D D D D A4 RA4 D D D A5 RA5 D D D A6 RA6 D D
D A7 RA7 D D D D D D D
A0 RA0 D D D D A1 RA1 D D D D A2 RA2 D D D D A3
6
RA3 D D D D D D D D D D D D A4 RA4 D D D D A5 RA5
D D D D A6 RA6 D D D D A7 RA7 D D D D D D D D D
DDD
a. A0 = Activation of Bank 0; RA0 = Read with Auto-Precharge of Bank 0; D = Deselect
Rev. 0.1 / Dec 2008
45