HMT164U6AFP6C-S6 Datasheet, PDF (35/57 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

HMT164U6AFP(R)6C
HMT112U6(7)AFP(R)8C
HMT125U6(7)AFP(R)8C
Timing parameters are listed in the following table:
Table 4 — For IDD testing the following parameters are utilized.
Parameter
Bin
DDR3-800
DDR3-1066
DDR3-1333
5-5-5 6-6-6 6-6-6 7-7-7 8-8-8 7-7-7 8-8-8 9-9-9
t_CKmin(IDD)
CL(IDD)
2.5
5
6
1.875
6
7
8
1.5
7
8
9
t_RCDmin(IDD)
12.5 15 11.25 13.13 15 10.5 12 13.5
t_RCmin(IDD)
50 52.5 48.75 50.63 52.50 46.5 48 49.5
t_RASmin(IDD)
37.5 37.5 37.5 37.5 37.5 36 36 36
t_RPmin(IDD)
12.5 15 11.25 13.13 15 10.5 12 13.5
t_FAW(IDD)
x4/
x8
40
40 37.5 37.5 37.5 30
30
30
x16 50
50
50
50
50
45
45
45
t_RRD(IDD)
x4/
x8
10
10
7.5 7.5 7.5 6.0 6.0 6.0
x16 10
10
10
10
10 7.5 7.5 7.5
t_RFC(IDD) -
512Mb
90
90
90
90
90
90
90
90
t_RFC(IDD) - 1
Gb
110 110 110 110 110 110 110 110
t_RFC(IDD) - 2
Gb
160 160 160 160 160 160 160 160
t_RFC(IDD) - 4
Gb
tbd tbd tbd tbd tbd tbd tbd tbd
DDR3-1600
Unit
8-8-8 9-9-9 101010
1.25
ns
8
9
10 clk
10 11.25 12.5 ns
tbd tbd tbd ns
tbd tbd tbd ns
10 11.25 12.5 ns
30 30
30 ns
40 40
40 ns
6.0 6.0 6.0 ns
7.5 7.5 7.5 ns
90 90
90 ns
110 110 110 ns
160 160 160 ns
tbd tbd tbd ns
The following conditions apply:
- IDD specifications are tested after the device is properly initialized.
- Input slew rate is specified by AC Parametric test conditions.
- IDD parameters are specified with ODT and output buffer disabled (MR1 Bit A12).
Rev. 0.1 / Dec 2008
35