HMT164U6AFP6C-S6 Datasheet, PDF (44/57 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

HMT164U6AFP(R)6C
HMT112U6(7)AFP(R)8C
HMT125U6(7)AFP(R)8C
CK
BA[2:0]
ADDR[12:0]
ADDR_b[10]
ADDR_c[12:11]
CS
RAS
CAS
WE
CMD[2:0]
DQ[7:0]
DM
000
001
000
3FF
00
11
010
011
000
3FF
00
11
RD D D# D# RD D D# D# RD D D# D# RD
00 00 FF FF 00 00 FF FF 00 00 FF FF 00 00 FF FF
-> Start of Measurement Loop
< Figure 3. IDD4R Example > (DDR3-800-555, 512Mb x8): data DQ is shown but the output buffer
should be switched off (per MR1 Bit A12=”1”) to achieve Iout = 0mA. Address inputs are split into 3
parts.
Rev. 0.1 / Dec 2008
44