HMT164U6AFP6C-S6 Datasheet, PDF(33/57 Page) Hynix Semiconductor

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HMT164U6AFP6C-S6 Datasheet, PDF (33/57 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

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2GB, 256M x 72 U-DIMM: HMT125U7AFP8C

Symbol

IDD0

IDD1

IDD2P(F)

IDD2P(S)

IDD2Q

IDD2N

IDD3P

IDD3N

IDD4W

IDD4R

IDD5B

IDD6(D)

IDD6(S)

IDD7

DDR3 800

1170

1305

450

180

810

900

630

990

1710

1620

2115

180

108

2475

DDR3 1066

1395

1530

540

180

1080

810

1260

2160

2025

2295

180

108

2790

HMT164U6AFP(R)6C

HMT112U6(7)AFP(R)8C

HMT125U6(7)AFP(R)8C

DDR3 1333

1620

1755

630

180

1260

1350

900

1530

2430

2565

2610

180

108

3420

Unit

note

6.7 IDD Measurement Conditions

Within the tables provided further down, an overview about the IDD measurement conditions is

provided as follows:

Table 1 â Overview of Tables providing IDD Measurement Conditions and DRAM Behavior

Table number

Measurement Conditions

Table 5 on page 33

IDD0 and IDD1

Table 6 on page 36

IDD2N, IDD2Q, IDD2P(0), IDD2P(1)

Table 7 on page 38

IDD3N and IDD3P

Table 8 on page 39

IDD4R, IDD4W, IDD7

Table 9 on page 42

IDD7 for different Speed Grades and different tRRD, tFAW conditions

Table 10 on page 43

IDD5B

Table 11 on page 44

IDD6, IDD6ET

Within the tables about IDD measurement conditions, the following definitions are used:

- LOW is defined as VIN <= VILAC(max.); HIGH is defined as VIN >= VIHAC(min.).

- STABLE is defined as inputs are stable at a HIGH or LOW level.

- FLOATING is defined as inputs are VREF = VDDQ / 2.

- SWITCHING is defined as described in the following 2 tables.

Rev. 0.1 / Dec 2008

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