PXD20 Datasheet, PDF (88/130 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Electrical characteristics
Table 38. Slow external crystal oscillator electrical characteristics
Symbol C
Parameter
Conditions¹
Value²
Unit SpecID
Min
Typ
Max
f_XOSCLP SR C Oscillator frequency
V_XOSCLP CC³ C Oscillation amplitude
V_DDA=3.3V10%,
V_{DDE_A}=3.3V10%
32
1.12
V_DDA=5.0V10%,
V_{DDE_A}=5.0V10%
I_XOSCLP CC³ D Oscillator consumption
—
T_XOSCLPS CC³ D Oscillator start-up time
—
U
1.12
—
—
V_IH SR C Input high level CMOS Oscillator bypass mode 0.65V_DDA
Schmitt Trigger
0.65V_{DDE_A}
V_IL
SR C Input low level CMOS Oscillator bypass mode V_SS–0.4
Schmitt Trigger
1 _{VDD = 3.3 V ±10% / 5.0 V ±10%, TA = –40 to +105 °C, unless otherwise specified}
2 _{All values need to be confirmed during device validation.}
3 _{Granted by device validation}
—
1.33
1.37
—
—
—
—
40
kHz O10.1
1.74
V O10.2
1.74
5
µA O10.3
2
s O10.4
V_DDA+0.4 V
V_{DDE_A}+0.4
0.35V_DDA V
0.35V_{DDE_A}
O10.5
O10.6
4.12 FMPLL electrical characteristics
The device provides a frequency-modulated phase-locked loop (FMPLL) module to generate a fast system clock from the fast
external oscillator driver.
Table 39. FMPLL electrical characteristics
Symbol C
Parameter
Conditions¹
Value²
Unit SpecID
Min Typ Max
f_PLLIN SR T PLL reference clock³
—
4
— 120 MHz O11.1
_PLLIN SR T PLL reference clock duty cycle³
—
47.5 — 52.5 % O11.2
f_PLLOUT CC⁴ T PLL output clock frequency
—
15
— 250⁵ MHz O11.3
f_CPU CC⁴ T System clock frequency
—
—
— 125⁶ MHz O11.4
T_LOCK CC⁴ T PLL lock time
Stable oscillator (f_PLLIN = 10 MHz) —
— 100 µs O11.5
T_PKJIT CC⁴ T PLL jitter
f_PLLOUT (PHI i.e. FMPLL O/P) = –509 —
15.625 MHz @ 10 MHz resonator
509 ps O11.6
T_LTJIT CC⁴ T PLL long term jitter
f_PLLIN = 10 MHz (resonator)
I_PLL CC⁷ D Current Consumption (Normal T_A = 25°C
Mode for Analog Supply)
–2.4 — 2.4 ns O11.7
—
— 500 µA O11.8
1 _{VDDPLL = 1.2 V ±10%, TA = –40 to 105 °C, unless otherwise specified.}
2 _{All values need to be confirmed during device validation.}
3 _{PLLIN clock retrieved directly from XOSCHS clock. Input characteristics are granted when oscillator is used in functional}
mode. When bypass mode is used, oscillator input clock should verify f_PLLIN and _PLLIN.
PXD20 Microcontroller Data Sheet, Rev. 2
88
Preliminary—Subject to Change Without Notice
Freescale Semiconductor