PXD20 Datasheet, PDF (124/130 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Electrical characteristics
2
6
SCL
1
SDA
4
7
5
8
3
9
Figure 41. I²C input/output timing
4.18.12 QuadSPI timing
The following notes apply to Table 69 and Table 70:
• All data is based on a negative edge data launch from PXD20 and a positive edge data capture, as shown in the timing
diagrams in this section.
• The supply conditions, over a temperature range of –45 C to 125 C/150 C, are as follows:
— I/O voltage: 3.0 V, Core supply: 1.2 V
— I/O voltage: 3.3 V, Core supply: 1.2 V
— I/O voltage: 3.6 V, Core supply: 1.2 V
• The actual frequency at which the device can work will be a combination of this data and the clock pad profile.
• All measurements are considering 70% of VDDE levels for clock pin and 50% of VDDE level for data pins.
• Timings assume a setting of 0x0000_000x for QSPI_SMPR register (see the reference manual for details).
• A negative value of hold is an indication of pad delay on the clock pad (delay b/w actual edge capturing data in the
device vs. edge appearing at the pin).
• Measurements are with a load of 50 pF on output pins
• The clock profile is measured at 30% to 70% levels of VDDE.
Table 69. QuadSPI timing specifications, maximum temperature 125 C
Symbol C
Parameter
Tcq CC T Clock to Q delay
Ts CC T Setup time for incoming data
Th CC T Hold time requirement for incoming data
tr CC T Clock pad rise time
tf CC T Clock pad fall time
Value
Unit SpecID
Min
Typ
Max
3.8
5.3
12.1 ns A13.1
7.6
9
13.2 ns A13.2
–13
–8.5
–7.5 ns A13.3
0.5
0.7
1.0
ns A13.4
0.8
0.8
1.2
ns A13.5
The numbers in Figure 42 and Figure 43 correspond to events as described in Table 70.
PXD20 Microcontroller Data Sheet, Rev. 2
124
Preliminary—Subject to Change Without Notice
Freescale Semiconductor