PXD20 Datasheet, PDF (32/130 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Pinout and signal descriptions
Table 6. DRAM interface pin summary (continued)
Port pin¹
Function
DDR_DQ[11] DRAM Data Bus [11]
DDR_DQ[10] DRAM Data Bus [10]
DDR_DQ[9] DRAM Data Bus [9]
DDR_DQ[8] DRAM Data Bus [8]
DDR_DQ[7] DRAM Data Bus [7]
DDR_DQ[6] DRAM Data Bus [6]
DDR_DQ[5] DRAM Data Bus [5]
DDR_DQ[4] DRAM Data Bus [4]
DDR_DQ[3] DRAM Data Bus [3]
DDR_DQ[2] DRAM Data Bus [2]
DDR_DQ[1] DRAM Data Bus [1]
DDR_DQ[0] DRAM Data Bus [0]
DRAM Data Strobes
DDR_DQS[3] DRAM Data Strobe [3]
DDR_DQS[2] DRAM Data Strobe [2]
DDR_DQS[1] DRAM Data Strobe [1]
DDR_DQS[0] DRAM Data Strobe [0]
DRAM Data Enables
DDR_DM[3] DRAM Data Enable [3]
DDR_DM[2] DRAM Data Enable [2]
DDR_DM[1] DRAM Data Enable [1]
DDR_DM[0] DRAM Data Enable [0]
DRAM Address
DDR_A[15]
DRAM address [15]
DDR_A[14]
DDR_A[13]
DRAM address [14]
DRAM address [13]
DDR_A[12]
DRAM address [12]
DDR_A[11]
DRAM address [11]
I/O
direction
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Pad
type
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
PCR
RESET
config²
Pin number
416 TEPBGA
PCR[257] None, None
J1
PCR[258] None, None
K4
PCR[259] None, None
K1
PCR[260] None, None
L1
PCR[261] None, None
L4
PCR[262] None, None
M4
PCR[263] None, None
M1
PCR[264] None, None
N4
PCR[265] None, None
N1
PCR[266] None, None
P4
PCR[267] None, None
P1
PCR[268] None, None
R1
I/O
DDR PCR[232] None, None
B3
I/O
DDR PCR[231] None, None
G2
I/O
DDR PCR[230] None, None
K2
I/O
DDR PCR[229] None, None
N2
Output
DDR PCR[236] Output,
B4
None
Output
DDR PCR[235] Output,
G3
None
Output
DDR PCR[234] Output,
K3
None
Output
DDR PCR[233] Output,
P3
None
Output
DDR PCR[217] Output,
B15
None
Output
DDR PCR[216] Output,
D15
None
Output
DDR PCR[215] Output,
D14
None
Output
DDR PCR[214] Output,
A14
None
Output
DDR PCR[213] Output,
D13
None
PXD20 Microcontroller Data Sheet, Rev. 2
32
Preliminary—Subject to Change Without Notice
Freescale Semiconductor