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PXD20 Datasheet, PDF (112/130 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller
Electrical characteristics
4.18.5 DRAM interface
DDR Interface specification from ‘MCD — 32 Bit Automotive MCU — CMOS090LP2’ I/O Pad
Specification Revision 1.5 — May14th 2008.
This device supports SDR, DDR1, DDR2 half and full strengths, as well as LPDDR half and full speeds.
Table 57 shows the SRE settings for the different modes.
Table 57. Pad mode configurations
ipp_sre[2:0]
000
001
010
011
100
101
110
111
Mode
1.8V LPDDR Half Speed
1.8V LPDDR Full Speed
1.8V DDR2 Half Strength
2.5V DDR1
Not supported
Not supported
1.8V DDR2 Full Strength
SDR
NOTE:
The specifications given in Table 58 are preliminary.
Table 58. LPDDR, DDR, and DDR2 (DDR2-250) SDRAM timing specifications1 2 3
No. Symbol
Parameter
Min
Max
Unit
1
F CC Frequency of Operation (Clock Period)
N/A
125
1.1 tCK CC Clock period
2 VIX-AC CC MCK AC differential crosspoint voltage4
3
tCH CC CK HIGH pulse width 4, 5
4
tCL CC CK LOW pulse width 4, 5
5 tDQSS CC Skew between MCK and DQS transitions5, 6
6 tOS(base) CC Address and control output setup time relative to MCK
rising edge5, 6
N/A
8
VDDE_DR × 0.5 – 0.1 VDDE_DR × 0.5 + 0.1
0.47
0.53
0.47
0.53
150
150
(tCK/2) – 1000
N/A
7 tOH(base) CC Address and control output hold time relative to MCK
rising edge5, 6
(tCK/2) + 1000
8 tDS1(base) CC DQ and DM output setup time relative to DQS5, 6
9 tDH1(base) CC DQ and DM output hold time relative to DQS5, 6
10 tDQSQ CC DQS-DQ skew for DQS and associated DQ inputs5
(tCK/4) – 750
(tCK/4) + 750
–(tCK/4) – 600
11 tDQSEN CC DQS window start position related to CAS read
command4, 5, 6, 7, 8
TBD
1 At recommended operating conditions with VDDE_DR of ±5%.
2 VDDE_DR value is 1.8 for DDR2 mode, 2.5 V for DDR1 mode, and 1.8 V for LPDDR mode.
3 CZ at –40, 140, 25 oC.
N/A
N/A
N/A
(tCK/4) – 600
TBD
MHz
ns
V
TCK
tCK
ps
ps
ps
ps
ps
ps
ps
PXD20 Microcontroller Data Sheet, Rev. 2
112
Preliminary—Subject to Change Without Notice
Freescale Semiconductor