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PXD20 Datasheet, PDF (105/130 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller
Electrical characteristics
4.18.2 Nexus debug interface
Table 53. Nexus debug port timing1
Num
Symbol
C
Characteristic
Min
Max
Unit
SpecID
1
tMCYC
CC2 D MCKO Cycle Time
15
—
ns
A2.1
2
tMDC
CC2 D MCKO Duty Cycle
40
60
%
A2.2
3
tMDOV
CC2 D MCKO Low to MDO Data Valid3
0.1
0.2
tMCYC
A2.3
4
tMSEOV
CC2 D MCKO Low to MSEO Data Valid3
0.1
0.2
tMCYC
A2.4
5
tEVTOV
CC2 D MCKO Low to EVTO Data Valid3
0.1
0.2
tMCYC
A2.5
6
tEVTIPW
CC2 D EVTI Pulse Width
4
—
tTCYC
A2.6
7
tEVTOPW
CC2 D EVTO Pulse Width
1
—
tMCYC
A2.7
8
tTCYC
CC2 D TCK Cycle Time4
100
—
ns
A2.8
9
tTDC
CC2 D TCK Duty Cycle
40
60
%
A2.9
10 tNTDIS, tNTMSS CC2 D TDI, TMS Data Setup Time
25
—
ns
A2.10
11
tNTDIH,
CC2 D TDI, TMS Data Hold Time
tNTMSH
5
—
ns
A2.11
12
tJOV
CC2 D TCK Low to TDO Data Valid
0
35
ns
A2.12
1 JTAG specifications in this table apply when used for debug functionality. All Nexus timing relative to MCKO is measured from
50% of MCKO and 50% of the respective signal. Nexus timing specified at VDD = 3.0 V to 3.6 V, TA = –40 to 105 °C, and
CL = 50 pF (Cl = 30 pF on MCKO), with SRC = 0b10 for MCKO and 0b11 for others.
2 Parameter values guaranteed by design.
3 MDO, MSEO, and EVTO data is held valid until next MCKO low cycle.
4 The system clock frequency needs to be three times faster that the TCK frequency.
Nexus Dual Data Rate is not supported. The timings are mentioned for dedicated pins on 416TEPBGA package. The max value
for #2, 3, and 4 above, are 0.3 of tMCYC for shared Nexus ports.
MCKO
MDO
MSEO
EVTO
1
2
3
4
5
Output Data Valid
Figure 21. Nexus output timing
PXD20 Microcontroller Data Sheet, Rev. 2
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
105