|
S9S12G128F0MLH Datasheet, PDF (775/1292 Pages) Freescale Semiconductor, Inc – S12 CPU core, Up to 240 Kbyte on-chip flash with ECC | |||
|
◁ |
Timer Module (TIM16B8CV3)
Table 23-25. TIM16B8CV3 Interrupts
Interrupt
Offset Vector Priority
Source
Description
C[7:0]F
â
â
â
Timer Channel 7â0
Active high timer channel interrupts 7â0
PAOVI
â
â
PAOVF
â
â
â
Pulse Accumulator Active high pulse accumulator input interrupt
Input
â
Pulse Accumulator
Overï¬ow
Pulse accumulator overï¬ow interrupt
TOF
â
â
â
Timer Overï¬ow
Timer Overï¬ow interrupt
The TIM16B8CV3 could use up to 11 interrupt vectors. The interrupt vector offsets and interrupt numbers
are chip dependent.
23.6.1 Channel [7:0] Interrupt (C[7:0]F)
This active high outputs will be asserted by the module to request a timer channel 7 â 0 interrupt. The TIM
block only generates the interrupt and does not service it. Only bits related to implemented channels are
valid.
23.6.2 Pulse Accumulator Input Interrupt (PAOVI)
This active high output will be asserted by the module to request a timer pulse accumulator input interrupt.
The TIM block only generates the interrupt and does not service it.
23.6.3 Pulse Accumulator Overï¬ow Interrupt (PAOVF)
This active high output will be asserted by the module to request a timer pulse accumulator overï¬ow
interrupt. The TIM block only generates the interrupt and does not service it.
23.6.4 Timer Overï¬ow Interrupt (TOF)
This active high output will be asserted by the module to request a timer overï¬ow interrupt. The TIM block
only generates the interrupt and does not service it.
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
777
|
▷ |