MC68HC05K0 Datasheet, PDF (62/154 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Technical Data
Freescale Semiconductor, Inc.
6.5 Halt Mode
If the mask option to disable the STOP instruction is selected, a STOP
instruction puts the MCU in halt mode. Halt mode is identical to wait
mode, except that a recovery delay of from 1 to 4064 internal clock
cycles occurs when the MCU exits halt mode. If the mask option to
disable the STOP instruction is selected, the COP watchdog cannot be
turned off inadvertently by a STOP instruction.
Figure 6-1 shows the sequence of events in stop, wait, and halt modes.
6.6 Data-Retention Mode
In data-retention mode, the MCU retains random-access memory (RAM)
contents and CPU register contents at V_DD voltages as low as 2.0 Vdc.
The data-retention feature allows the MCU to remain in a low
power-consumption state during which it retains data, but the CPU
cannot execute instructions.
To put the MCU in data-retention mode:
1. Drive the RESET pin to a logic 0.
2. Lower the V_DD voltage. The RESET pin must remain low
continuously during data-retention mode.
To take the MCU out of data-retention mode:
1. Return V_DD to normal operating voltage.
2. Return the RESET pin to a logic 1.
Technical Data
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
Low-Power Modes
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