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MC68HC05K0 Datasheet, PDF (55/154 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit
Freescale Semiconductor, Inc.
Resets
Reset Types
5.3.2 External Reset
An external reset is generated by applying a logic 0 for 1 1/2 tcyc to the
RESET pin. A Schmitt trigger senses the logic level at the RESET pin.
A COP reset or an illegal address reset pulls the RESET pin low for one
internal clock cycle. A low-voltage reset pulls the RESET pin low for as
long as the low-voltage condition exists.
NOTE: To avoid overloading some power supply designs, do not connect the
RESET pin directly to VDD. Use a pullup resistor of 10 kΩ or more.
COP WATCHDOG
(MASK OPTION)
LOW-VOLTAGE RESET
(MASK OPTION)
VDD
POWER-ON RESET
ILLEGAL ADDRESS RESET
INTERNAL ADDRESS BUS
RESET
INTERNAL
CLOCK
S
RST
D
RESET
LATCH
R
TO CPU AND
SUBSYSTEMS
Figure 5-1. Reset Sources
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
Resets
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Technical Data