MC68HC05K0 Datasheet, PDF (57/154 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Resets
Reset States
5.3.5 Low-Voltage Reset
The low-voltage reset circuit is a mask option that generates a reset
signal if the voltage on the V_DD pin falls below the LVR trip point. V_DD
must be set at 5 V ±10% if the mask option enabling the low-voltage
reset circuit is selected.
A low-voltage reset pulls the RESET pin low for as long as the
low-voltage condition exists.
NOTE:
When the low-voltage reset is enabled, use a pullup resistor on RESET
because low-voltage reset shorts RESET to ground when it detects a
low V_DD. If there is no pullup to limit current, low-voltage reset will short
V_DD to ground, causing the chip to possibly remain in reset due to V_DD
being pulled down by the short. V_DD may also pull current and
permanently damage the chip.
5.4 Reset States
This subsection describes how resets initialize the MCU.
5.4.1 CPU
A reset has these effects on the CPU:
• Loads the stack pointer with $FF
• Sets the I bit in the condition code register, inhibiting interrupts
• Sets the IRQE bit in the interrupt status and control register
• Loads the program counter with the user-defined reset vector from
locations $03FE and $03FF
• Clears the IRQF bit (IRQ latch)
• Clears the stop latch, enabling the CPU clock, or exiting the halt
mode
• Clears the wait latch, waking the CPU from wait mode
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
Resets
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Technical Data