MC68HC05K0 Datasheet, PDF (44/154 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Technical Data
Freescale Semiconductor, Inc.
4.3 Interrupt Types
These conditions generate interrupts:
• SWI instruction (software interrupt)
• A logic 0 applied to the IRQ/V_PP pin (external interrupt)
• A logic 1 applied to one of the PA3–PA0 pins if the port A external
interrupt mask option is selected (external interrupt)
• A timer overflow (timer interrupt)
• Expiration of the real-time interrupt period (timer interrupt)
An interrupt temporarily suspends normal program execution to process
a particular event. An interrupt does not stop the execution of the
instruction in progress, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the
central processor unit (CPU) registers on the stack and loads the
program counter with a user-defined vector address.
4.3.1 Software Interrupt
The software interrupt (SWI) instruction causes a non-maskable
interrupt.
4.3.2 External Interrupts
These sources can generate external interrupts:
• IRQ/V_PP pin
• PA3–PA0 pins if the port A external interrupts mask option is
selected
Setting the I bit in the condition code register or clearing the IRQE bit in
the interrupt status and control register disables external interrupts.
See Figure 4-2.
Technical Data
MC68HC05K0 • MC68HC05K1 — Rev. 2.0
Interrupts
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