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I.MX27 Datasheet, PDF (53/148 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor
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Table 22. Non-Gated Clock Mode Parameters (continued)
Parameter
csi_d hold time
csi_pixclk high time
csi_pixclk low time
csi_pixclk high time
Minimum
1
THCLK
THCLK
0
Maximum
—
—
—
HCLK/2
HCLK = AHB System Clock, THCLK = Period of HCLK
Electrical Characteristics
Unit
ns
ns
ns
MHz
4.2.6 Configurable Serial Peripheral Interface (CSPI)
This section describes the electrical information of the CSPI.
4.2.6.1 CSPI Timing
Figure 13 and Figure 14 show the master mode and slave mode timings of CSPI, and Table 23 lists the
timing parameters.
i.MX27 and i.MX27L Data Sheet, Rev. 1.5
Freescale Semiconductor
53