MC912D60AVPVE8 Datasheet, PDF (308/460 Pages) Freescale Semiconductor, Inc – HC12 Microcontrollers

MSCAN Controller
msCAN12
RxBG
RxFG
RXF
CPU bus
Technical Data
308
Tx0
TXE
PRIO
Tx1
TXE
PRIO
Tx2
TXE
PRIO
Figure 17-2. User Model for Message Buffer Organization
When the msCAN12 module is transmitting, the msCAN12 receives its
own messages into the background receive buffer, RxBG, but does NOT
overwrite RxFG, generate a receive interrupt or acknowledge its own
messages on the CAN bus. The exception to this rule is in loop-back
mode (see msCAN12 Module Control Register 1 (CMCR1).) where the
msCAN12 treats its own messages exactly like all other incoming
messages. The msCAN12 receives its own transmitted messages in the
event that it loses arbitration. If arbitration is lost, the msCAN12 must be
prepared to become receiver.
MSCAN Controller
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor