MC912D60AVPVE8 Datasheet, PDF (109/460 Pages) Freescale Semiconductor, Inc – HC12 Microcontrollers

EEPROM Memory
EEPROM Control Registers
EEDIV[9:0] — Prescaler divider
Loaded from SHADOW word at reset.
Read anytime. Write once in normal modes (SMODN =1) if EELAT =
0 and anytime in special modes (SMODN =0) if EELAT = 0.
The prescaler divider is required to produce a self-time clock with a
fixed frequency around 28.6 Khz for the range of oscillator
frequencies. The divider is set so that the oscillator frequency can be
divided by a divide factor that can produce a 35 µs +/- 2µs pulse.
CAUTION:
An incorrect or uninitialized value on EEDIV can result in overstress of
EEPROM array during program/erase operation. It is also strongly
recommend not to program EEPROM with oscillator frequencies less
than 250 Khz.
The EEDIV value is determined by the following formula:
EEDIV = INT[EXTALi (hz) x 35×10–6 + 0.5]
NOTE:
INT[A] denotes the round down integer value of A. Program/erase cycles
will not be activated when EEDIV = 0.
Table 8-1. EEDIV Selection
Osc Freq.
16 Mhz
8 Mhz
4 Mhz
2 Mhz
1 Mhz
500 Khz
250 Khz
Osc Period
62.5ns
125ns
250ns
500ns
1µs
2µs
4µs
Divide Factor
560
280
140
70
35
18
9
EEDIV
$0230
$0118
$008C
$0046
$0023
$0012
$0009
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor
EEPROM Memory
Technical Data
109