MC912D60AVPVE8 Datasheet, PDF (30/460 Pages) Freescale Semiconductor, Inc – HC12 Microcontrollers

General Description
BKGD
XFC
VDDPLL
VSSPLL
60K byte flash EEPROM
2K byte RAM
1K byte EEPROM
CPU12
Periodic interrupt
Single-wire
background
COP watchdog
debug module ^{Clock monitor}
Breakpoints
PLL
ATD1
VRH1
VRL1
VDDAD
VSSAD
AN10
AN11
AN12
AN13
AN14
AN15
AN16
AN17
Enhanced
capture
timer
ATD0
VRH0
VRL0
VDDAD
VSSAD
AN00
AN01
AN02
AN03
AN04
AN05
AN06
AN07
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
VRH0
VRL0
VDDAD
VSSAD
PAD00
PAD01
PAD02
PAD03
PAD04
PAD05
PAD06
PAD07
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
EXTAL
Lite
SCI0
(MI
BUS)
RxD0
TxD0
PS0
PS1
XTAL
RESET
integration
module
SCI1
RxD1
TxD1
PS2
PS3
(LIM)
SISO/MISO
PS4
SPI
MOMI/MOSI
SCK
PS5
PS6
PE0
XIRQ
SS
PS7
PE1
IRQ
PE2
PE3
PE4
PE5
PE6
R/W
LSTRB/TAGLO
ECLK
MODA/IPIPE0
MODB/IPIPE1/CGMTST
PWM
PW0
PW1
PW2
PW3
PP0
PP1
PP2
PP3
PE7
DBE/CAL/ECLK
PP4
I/O
PP5
PP6
PP7
Multiplexed Address/Data Bus
DDRA
PORT A
DDRB
PORT B
PCAN7
PCAN6
PCAN5
PCAN4
PCAN3
PCAN2
CAN
TxCAN PCAN1
RxCAN PCAN0
Wide
bus
Narrow bus
PG7
KWG6
KWG5
KWG4
KWG3
KWG2
KWG1
KWG0
PGUPD(VDD)
KWH7
KWH6
KWH5
KWH4
KWH3
KWH2
KWH1
KWH0
PHUPD(VSS)
PG4
VDD ×2
VSS ×2
Power for internal circuitry
VDDX ×2
PH4 ^{VSSX ×2}
Power for I/O drivers
Note: _{Several I/O on ports G, H and CAN are unavailable externally on the 80-pin QFP package. These in-}
ternal pins should either be defined as outputs or have their pull-ups/downs enabled.
Figure 1-2. MC68HC912D60A 80-pin QFP Block Diagram
Technical Data
30
General Description
MC68HC912D60A — Rev. 3.1
Freescale Semiconductor