MC9328MX21_10 Datasheet, PDF (10/100 Pages) Freescale Semiconductor, Inc – 266 MHz i.MX family of microprocessors

Signal Descriptions
Table 2. i.MX21 Signal Descriptions (Continued)
Signal Name
PC_RST
PC_OE
PC_WE
PC_VS1
PC_VS2
PC_BVD1
PC_BVD2
PC_SPKOUT
PC_REG
PC_CE1
PC_CE2
PC_IORD
PC_IOWR
PC_WP
PC_POE
PC_RW
PC_PWRON
CSPI1_MOSI
CSPI1_MISO
CSPI1_SS[2:0]
CSPI1_SCLK
CSPI1_RDY
CSPI2_MOSI
CSPI2_MISO
CSPI2_SS[2:0]
CSPI2_SCLK
CSPI3_MOSI
CSPI3_MISO
CSPI3_SS
CSPI3_SCLK
Function/Notes
PCMCIA Reset output signal. This signal is multiplexed with NFRB signal of NF.
PCMCIA Memory Read Enable output signal asserted during common or attribute memory read cycles.
This signal is multiplexed with NFALE signal of NF.
PCMCIA Memory Write Enable output signal asserted during common or attribute memory cycles. This
signal is shared with RW of the EIM.
PCMCIA Voltage Sense1 input signal. This signal is multiplexed with NFIO[2] signal of NF.
PCMCIA Voltage Sense2 input signal. This signal is multiplexed with NFIO[1] signal of NF.
PCMCIA Battery Voltage Detect1 input signal. This signal is multiplexed with NFIO[0] signal of NF.
PCMCIA Battery Voltage Detect2 input signal. This signal is multiplexed with NF_WE signal of NF.
PCMCIA Speaker Out output signal. This signal is multiplexed with PWMO signal.
PCMCIA Register Select output signal. This signal is shared with EB2 of EIM.
PCMCIA Card Enable1 output signal. This signal is multiplexed with NFCE signal of NF.
PCMCIA Card Enable2 output signal. This signal is multiplexed with NFWP signal of NF.
PCMCIA IO Read output signal. This signal is shared with EB3 of EIM.
PCMCIA IO Write output signal. This signal is shared with OE signal of EIM.
PCMCIA Write Protect input signal. This signal is multiplexed with NFIO[3] signal of NF.
PCMCIA Output Enable signal to enable voltage translation buffers and transceivers. This signal is
multiplexed with NFCLE signal of NF.
PCMCIA Read Write output signal to control external transceiver direction. Asserted high for read
access and negated low for write access. This signal is multiplexed with NFRE signal of NF.
PCMCIA input signal to indicate that the card power has been applied and stabilized.
CSPI
Master Out/Slave In signal
Master In/Slave Out signal
Slave Select (Selectable polarity) signal. CSPI1_SS2 is also multiplexed with USBG_RXDAT and
CSPI1_SS1 is multiplexed with EXT_DMAGRANT.
Serial Clock signal
Serial Data Ready signal. Also multiplexed with EXT_DMAREQ.
Master Out/Slave In signal. This signal is multiplexed with USBH2_TXDP signal of USB OTG.
Master In/Slave Out signal. This signal is multiplexed with USBH2_TXDM signal of USB OTG.
Slave Select (Selectable polarity) signals. These signals are multiplexed with USBH2_FS,
USBH2_RXDP and USBH2_RXDM signal of USB OTG
Serial Clock signal. This signal is multiplexed with USBH2_OE signal of USB OTG
Master Out/Slave In signal. This signal is multiplexed with SD1_CMD.
Master In/Slave Out signal. This signal is multiplexed with SD1_D0.
Slave Select (Selectable polarity) signal multiplexed with SD1_D3.
Serial Clock signal. This signal is multiplexed with SD1_CLK.
MC9328MX21 Technical Data, Rev. 3.4
10
Freescale Semiconductor