ES29LV160F Datasheet, PDF (27/71 Pages) Excel Semiconductor Inc. – 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

ES29LV160F
Excel Semiconductor Inc.
When the Embedded Program algorithm is complete, the device then returns to reading array data
and addresses are no longer latched. The system can determine the status of the program
operation by using DQ7, DQ6, or RY/BY#. See Write Operation Status on page 33 for information
on these status bits.
Any commands written to the device during the Embedded Program Algorithm are ignored. Note
that a hardware reset immediately terminates the programming operation. The Byte Program
command sequence should be reinitiated once the device has reset to reading array data, to
ensure data integrity.
Programming is allowed in any sequence and across sector boundaries. A bit cannot be
programmed from a 0 back to a 1. Attempting to do so may halt the operation and set DQ5 to 1,
or cause the Data# Polling algorithm to indicate the operation was successful. However, a
succeeding read will show that the data is still 0. Only erase operations can convert a 0 to a 1.
9.5 Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program bytes or words to the device faster than
using the standard program command sequence. The unlock bypass command sequence is
initiated by first writing two unlock cycles. This is followed by a third write cycle containing the
unlock bypass command, 20h. The device then enters the unlock bypass mode. A two-cycle
unlock bypass program command sequence is all that is required to program in this mode. The first
cycle in this sequence contains the unlock bypass program command, A0h; the second cycle
contains the program address and data. Additional data is programmed in the same manner. This
mode dispenses with the initial two unlock cycles required in the standard program
command sequence, resulting in faster total programming time. Table 10.1 on page 32 shows the
requirements for the command sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset
commands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. The first cycle must contain the data 90h; the second cycle the
data 00h. Addresses are don’t care for both cycles. The device then returns to reading array data.
Figure 9.1 on page 28 illustrates the algorithm for the program operation. See Erase/Program
Operations on page 49 for parameters, and to Figure 17.5 on page 49 for timing diagrams.
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