English
Language : 

XRT82L24A Datasheet, PDF (4/39 Pages) Exar Corporation – QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT82L24A
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.1.2
áç
TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................. 1
FEATURES .................................................................................................................................................... 1
APPLICATIONS .............................................................................................................................................. 1
Figure 1. Block Diagram of the XRT82L24A E1 LIU (Host Mode) ......................................................... 1
Figure 2. Block Diagram of the XRT82L24A T1/E1/J LIU (Hardware Mode) ........................................ 2
Figure 3. Pin Out of the XRT82L24A ....................................................................................................... 3
TABLE OF CONTENTS ....................................................................................................... I
PIN DESCRIPTION ............................................................................................................. 4
RECEIVER SECTIONS .................................................................................................................................... 4
TRANSMITTER SECTIONS .............................................................................................................................. 4
MICROPROCESSOR INTERFACE ...................................................................................................................... 5
CLOCKS ....................................................................................................................................................... 7
JITTER ATTENUATOR .................................................................................................................................... 7
CONTROL ..................................................................................................................................................... 7
POWER SUPPLIES AND GROUNDS ................................................................................................................. 8
SYSTEM-FUNCTIONAL DESCRIPTION ......................................................................... 10
RECEIVER .................................................................................................................................................. 10
JITTER ATTENUATOR .................................................................................................................................. 10
GAPPED CLOCK (JA MUST BE ENABLED IN THE TRANSMIT PATH) ................................................................. 10
TABLE 1: MAXIMUM GAP WIDTH FOR MULTIPLEXER/MAPPER APPLICATIONS ............................................... 10
HDB3/AMI DECODER ................................................................................................................................. 10
RECEIVER LOSS OF SIGNAL (LOS) .............................................................................................................. 10
CONDITIONS FOR DECLARING AND CLEARING LOS IN THE E1 MODE. ............................................................ 11
RECEIVE DATA MUTING .............................................................................................................................. 11
LOOP-BACK MODES .............................................................................................................................. 11
REMOTE LOOP-BACK (RLOOP) MODE ...................................................................................................... 11
DIGITAL LOCAL LOOP-BACK (DLOOP) MODE ............................................................................................... 11
ANALOG LOCAL LOOP-BACK (ALOOP) MODE .............................................................................................. 12
Figure 4. Remote Loop-Back with jitter attenuator selected in receive path .................................... 12
Figure 5. Remote Loop-Back with jitter attenuator selected in transmit path .................................. 12
Figure 6. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected & in re-
ceive path) .............................................................................................................................. 13
Figure 7. Digital Local Loop-Back with option to transmit all “ones” to the line (JA selected & in
transmit path) ......................................................................................................................... 13
Figure 8. Analog Local Loop-Back signal flow Jitter Attenuator selected & in Receive path ........ 14
Figure 9. Analog Local Loop-Back signal flow Jitter Attenuator selected & in transmit path ........ 14
RESET OPERATION ..................................................................................................................................... 14
RECEIVER MODES OF OPERATION ............................................................................................................... 14
RECEIVE DATA INVERT MODE ..................................................................................................................... 14
Figure 10. Data changes on rising edge of Clk and Data is sampled on falling edge ..................... 15
Figure 11. Data changes on falling edge of Clk and is sampled on rising edge .............................. 15
TRANSMIT CLOCK SAMPLING EDGE ............................................................................................................. 15
SINGLE RAIL, DUAL RAIL .............................................................................................................................. 15
TRANSMIT ALL ONES (TAOS) ..................................................................................................................... 15
HDB3/AMI ENCODER ................................................................................................................................. 15
TRANSMIT PULSE SHAPER .......................................................................................................................... 16
DRIVER MONITOR ....................................................................................................................................... 16
TRANSMIT OFF CONTROL ............................................................................................................................ 16
INTERFACING THE XRT 82L24A TO THE LINE .............................................................................................. 16
Figure 12. XRT 82L24A Channel 1in an E1 unbalanced 75 W application ........................................ 16
Figure 13. XRT 82L24A Channel 1 - E1 120 W balanced application ................................................. 17
TABLE 2: E1 RECEIVER ELECTRICAL CHARACTERISTICS ............................................................................. 18
I