XRT82L24A Datasheet, PDF (29/39 Pages) Exar Corporation – QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

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XRT82L24A
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.1.2
TABLE 12: CHANNEL STATUS REGISTER
CHANNEL STATUS REGISTER
PARALLEL PORT ADDRESS CHANNEL 0: 0010
PARALLEL PORT ADDRESS CHANNEL 1: 0101
PARALLEL PORT ADDRESS CHANNEL 2: 1000
PARALLEL PORT ADDRESS CHANNEL 3: 1011
BIT NO. SYMBOL
FUNCTION
REGISTER
TYPE
RESET
VALUE
7
DMOn Driver Monitor Output:
R
0
This bit is set to a "1" to indicate current DMO is detected. Any change in the
state of this bit causes an interrupt to be generated. Reading this register bit
does not clear the DMO bit.
6
LOSn Loss of Signal:
R
0
This bit is set to a "1" to indicate current LOS condition is detected. Any
change in the state of this bit causes an interrupt to be generated. Reading
this register bit does not clear the LOS bit.
5
LCVn Line Code Violation:
R
0
This bit is set to a "1" to indicate current LCV condition is detected. Any
change in the state of this bit causes an interrupt to be generated. Reading
this register bit does not clear the LCV bit.
4
TCKLn Transmit Clock Loss:
R
0
This bit is set to a "1" to indicate current TxClk clock loss is detected. Any
change in the state of this bit causes an interrupt to be generated. Reading
this register bit does not clear the TCKL bit.
3
DMOnIS Driver Monitor Output:
RUR
0
This bit is set to a "1" every time the state of DMO status changes since last
read. This bit is cleared by a read operation.
2
LOSnIS Latched- Loss of signal:
RUR
0
This bit is set to a "1" every time the state of LOS changes since last read.
This bit is cleared by a read operation.
1
LCVnIS Latched- Line Code Violation:
RUR
0
This bit is set to a "1" every time the state of LCV changes since last read.
This bit is cleared by a read operation.
0
TCLKnIS Latched-Transmit Clock Loss.
RUR
0
This bit is set to a "1" every time the state of TCKL changes since last read.
This bit is cleared by a read operation.
NOTE: n = channel number 0 to 3.
NOTE: Register Type Abrbreviation:
R = Read Only, R/W = Read or Write, RUR = Reset Upon Read
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