XRT82L24A Datasheet, PDF (10/39 Pages) Exar Corporation – QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT82L24A
QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.1.2
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PIN DESCRIPTIONS
PIN #
NAME
TYPE
DESCRIPTION
19
INT
O Interrupt Output.
This pin is asserted Low to indicate an alarm condition has occurred within the
device. Interrupt generation can be globally disabled by setting the GIE bit to a
"0" in the command control register.
NOTE: This pin is an open drain output and requires an external 10KΩ pull-up
resistor.
20
ICT
I In-Circuit Testing (Active Low).
When this pin is tied Low, all output pins are forced to high impedance state for
in-circuit testing.
NOTE: Internally pulled -up with 50kΩ.
58
LOOPSEL
I DLoop-back Mode Select.
In Hardware Mode, if LOOPEN_(0-3) is “High”, this pin is used for selecting
loop-back mode. Connect this pin "High" to select local loop-back and Low to
select remote loop-back. Digital Loop-back is not supported in Hardware Mode.
62
LOOPEN_0
61
LOOPEN_1
60
LOOPEN_2
59
LOOPEN_3
I Loop-back Enable - Channel_n:
In Hardware Mode:
Connect this pin “High” to enable channel_n loop-back operation. Remote or
local loop-back is determined by pin 58 setting.
63
FIFOS
I FIFO Size Select.
In Hardware Mode, connect this pin "High" selects 64 bit FIFO depth and con-
nect Low to select 32 bit FIFO depth.
POWER SUPPLIES AND GROUNDS
12
AVDD
**** Analog Positive Supply(3.3V± 5%)
28
DVDD
**** Digital Positive Supply(3.3V± 5%)
33
DVDD
**** Digital Positive Supply(3.3V± 5%)
90
TVDD_0
**** Transmitter_n Analog Positive Supply(3.3V± 5%).
36
TVDD_1
40
TVDD_2
86
TVDD_3
43
AVDD
**** Analog Positive Supply(3.3V± 5%)
48
DVDD
**** Digital Positive Supply(3.3V± 5%)
64
DVDD
**** Digital Positive Supply(3.3V± 5%)
78
DVDD
**** Digital Positive Supply(3.3V± 5%)
11
AGND
**** Analog Ground
13
DGND
**** Digital Ground
29
DGND
**** Digital Ground
30
DGND
**** Digital Ground
92
TGND_0
**** Transmitter_n Analog Ground.
34
TGND_1
42
TGND_2
84
TGND_3
8