LM3S2016 Datasheet, PDF (72/468 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Bit/Field
11
10
9:6
5:4
Name
BYPASS
reserved
XTAL
OSCSRC
Type
R/W
RO
R/W
R/W
Reset
1
0
0xB
Description
PLL Bypass
Chooses whether the system clock is derived from the PLL output or
the OSC source. If set, the clock that drives the system is the OSC
source. Otherwise, the clock that drives the system is the PLL output
clock divided by the system divider.
Note:
The ADC must be clocked from the PLL or directly from a
14-MHz to 18-MHz clock source to operate properly. While
the ADC works in a 14-18 MHz range, to maintain a 1 M
sample/second rate, the ADC must be provided a 16-MHz
clock source.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Crystal Value
This field specifies the crystal value attached to the main oscillator. The
encoding for this field is provided below.
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
0xB
0xC
0xD
0xE
0xF
Crystal Frequency (MHz) Crystal Frequency (MHz)
Not Using the PLL
Using the PLL
1.000
reserved
1.8432
reserved
2.000
reserved
2.4576
reserved
3.579545 MHz
3.6864 MHz
4 MHz
4.096 MHz
4.9152 MHz
5 MHz
5.12 MHz
6 MHz (reset value)
6.144 MHz
7.3728 MHz
8 MHz
8.192 MHz
0x1
Oscillator Source
Picks among the four input sources for the OSC. The values are:
Value Input Source
0x0 Main oscillator (default)
0x1 Internal oscillator (default)
0x2 Internal oscillator / 4 (this is necessary if used as input to PLL)
0x3 reserved
72
November 30, 2007
Preliminary