LM3S2016 Datasheet, PDF (436/468 Pages) List of Unclassifed Manufacturers – Microcontroller

Electrical Characteristics
19.2
19.2.1
AC Characteristics
Load Conditions
Unless otherwise specified, the following conditions are true for all timing measurements. Timing
measurements are for 4-mA drive strength.
Figure 19-1. Load Conditions
pin
C_L = 50 pF
GND
19.2.2
Clocks
Table 19-6. Phase Locked Loop (PLL) Characteristics
Parameter Parameter Name
Min Nom Max Unit
f_{ref_crystal} Crystal reference^a
3.579545 - 8.192 MHz
f_{ref_ext}
f_pll
External clock reference^a 3.579545 - 8.192 MHz
PLL frequency^b
-
400 - MHz
T_READY PLL lock time
-
- 0.5 ms
a. The exact value is determined by the crystal value programmed into the XTAL field of the Run-Mode Clock Configuration
(RCC) register.
b. PLL frequency is automatically calculated by the hardware based on the XTAL field of the RCC register.
Table 19-7. Clock Characteristics
Parameter Parameter Name
Min Nom Max Unit
f_IOSC
f_IOSC30KHZ
f_MOSC
Internal 12 MHz oscillator frequency
Internal 30 KHz oscillator frequency
Main oscillator frequency
8.4 12 15.6 MHz
21 30 39 KHz
1 - 8 MHz
t_{MOSC_per}
Main oscillator period
125 - 1000 ns
f_{ref_crystal_bypass}
Crystal reference using the main oscillator (PLL in BYPASS mode)
a
1
-
8 MHz
f_{ref_ext_bypass} External clock reference (PLL in BYPASS mode)^a
0 - 50 MHz
f_{system_clock}
System clock
0 - 50 MHz
a. The ADC must be clocked from the PLL or directly from a 14-MHz to 18-MHz clock source to operate properly.
Table 19-8. Crystal Characteristics
Parameter Name
Frequency
Frequency tolerance
Aging
Oscillation mode
Value
Units
8
6
4
3.5 MHz
±50 ±50 ±50 ±50 ppm
±5
±5
±5
±5 ppm/yr
Parallel Parallel Parallel Parallel
436
November 30, 2007
Preliminary