LM3S2016 Datasheet, PDF (389/468 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2016 Microcontroller
tProp 600 ns = 6 × tq
tSJW 100 ns = 1 × tq
tTSeg1 700 ns = tProp + tSJW
tTSeg2 200 ns = Information Processing Time + 1 × tq
tSync-Seg 100 ns = 1 × tq
bit time 1000 ns = tSync-Seg + tTSeg1 + tTSeg2
tolerance for CAN_CLK 0.39 % =
min(PB1,PB2)/ 2 × (13 x bit time - PB2) =
0.1us/ 2 x (13x 1us - 2us)
In the above example, the concatenated bit time parameters are (2-1)3&(7-1)4&(1-1)2&(1-1)6, and
CANBIT is programmed to 0x1600.
15.4.15.2 Example for Bit Timing at Low Baud Rate
In this example, the frequency of CAN_CLK is 2 MHz, BRP is 1, and the bit rate is 100 Kbps.
tq 1 ms = 2 × tCAN_CLK
delay of bus driver 200 ns
delay of receiver circuit 80 ns
delay of bus line (40m) 220 ns
tProp 1 ms = 1 × tq
tSJW 4 ms = 4 × tq
tTSeg1 5 ms = tProp + tSJW
tTSeg2 4 ms = Information Processing Time + 3 × tq
tSync-Seg 1 ms = 1 × tq
bit time 10 ms = tSync-Seg + tTSeg1 + tTSeg2
tolerance for CAN_CLK 1.58 % =
min(PB1,PB2)/ 2 x (13 x bit time - PB2) =
4us/ 2 x (13 x 10us - 4us)
In this example, the concatenated bit time parameters are (4-1)3&(5-1)4&(4-1)2&(2-1)6, and CANBIT
is programmed to 0x34C1.
15.5
Controller Area Network Register Map
Table 15-4 on page 389 lists the registers. All addresses given are relative to the CAN base address
of:
■ CAN0: 0x4004.0000
All accesses are on word (32-bit) boundaries.
Table 15-4. CAN Register Map
Offset Name
Type
0x000 CANCTL
R/W
0x004 CANSTS
R/W
0x008 CANERR
RO
0x00C CANBIT
R/W
0x010 CANINT
RO
Reset
0x0000.0001
0x0000.0000
0x0000.0000
0x0000.2301
0x0000.0000
Description
CAN Control
CAN Status
CAN Error Counter
CAN Bit Timing
CAN Interrupt
See
page
392
394
397
398
400
November 30, 2007
389
Preliminary