LM3S2016 Datasheet, PDF (124/468 Pages) List of Unclassifed Manufacturers – Microcontroller

Internal Memory
Register 10: User Debug (USER_DBG), offset 0x1D0
Note: Offset is relative to System Control base address of 0x400FE000.
This register provides a write-once mechanism to disable external debugger access to the device
in addition to 27 additional bits of user-defined data. The DBG0 bit (bit 0) is set to 0 from the factory
and the DBG1 bit (bit 1) is set to 1, which enables external debuggers. Changing the DBG1 bit to 0
disables any external debugger access to the device permanently, starting with the next power-up
cycle of the device. The NOTWRITTEN bit (bit 31) indicates that the register is available to be written
and is controlled through hardware to ensure that the register is only written once.
User Debug (USER_DBG)
Base 0x400F.E000
Offset 0x1D0
Type R/W, reset 0xFFFF.FFFE
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
NW
DATA
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA
DBG1 DBG0
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
Bit/Field
31
30:2
1
0
Name
NW
DATA
DBG1
DBG0
Type
Reset Description
R/W
1
User Debug Not Written
Specifies that this 32-bit dword has not been written.
R/W 0x1FFFFFFF User Data
Contains the user data value. This field is initialized to all 1s and can
only be written once.
R/W
1
Debug Control 1
The DBG1 bit must be 1 and DBG0 must be 0 for debug to be available.
R/W
0
Debug Control 0
The DBG1 bit must be 1 and DBG0 must be 0 for debug to be available.
124
November 30, 2007
Preliminary