LM3S2016 Datasheet, PDF (5/468 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2016 Microcontroller
10.4 Register Map .......................................................................................................................... 211
10.5 Register Descriptions .............................................................................................................. 212
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11.1
11.2
11.2.1
11.2.2
11.2.3
11.2.4
11.2.5
11.3
11.3.1
11.3.2
11.4
11.5
Analog-to-Digital Converter (ADC) ................................................................................. 233
Block Diagram ........................................................................................................................ 234
Functional Description ............................................................................................................. 234
Sample Sequencers ................................................................................................................ 234
Module Control ........................................................................................................................ 235
Hardware Sample Averaging Circuit ......................................................................................... 236
Analog-to-Digital Converter ...................................................................................................... 236
Test Modes ............................................................................................................................. 236
Initialization and Configuration ................................................................................................. 236
Module Initialization ................................................................................................................. 236
Sample Sequencer Configuration ............................................................................................. 236
Register Map .......................................................................................................................... 237
Register Descriptions .............................................................................................................. 238
12 Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 265
12.1 Block Diagram ........................................................................................................................ 266
12.2 Functional Description ............................................................................................................. 266
12.2.1 Transmit/Receive Logic ........................................................................................................... 266
12.2.2 Baud-Rate Generation ............................................................................................................. 267
12.2.3 Data Transmission .................................................................................................................. 268
12.2.4 Serial IR (SIR) ......................................................................................................................... 268
12.2.5 FIFO Operation ....................................................................................................................... 269
12.2.6 Interrupts ................................................................................................................................ 269
12.2.7 Loopback Operation ................................................................................................................ 270
12.2.8 IrDA SIR block ........................................................................................................................ 270
12.3 Initialization and Configuration ................................................................................................. 270
12.4 Register Map .......................................................................................................................... 271
12.5 Register Descriptions .............................................................................................................. 272
13 Synchronous Serial Interface (SSI) ................................................................................ 306
13.1 Block Diagram ........................................................................................................................ 306
13.2 Functional Description ............................................................................................................. 306
13.2.1 Bit Rate Generation ................................................................................................................. 307
13.2.2 FIFO Operation ....................................................................................................................... 307
13.2.3 Interrupts ................................................................................................................................ 307
13.2.4 Frame Formats ....................................................................................................................... 308
13.3 Initialization and Configuration ................................................................................................. 315
13.4 Register Map .......................................................................................................................... 316
13.5 Register Descriptions .............................................................................................................. 317
14 Inter-Integrated Circuit (I²C) Interface ............................................................................ 343
14.1 Block Diagram ........................................................................................................................ 343
14.2 Functional Description ............................................................................................................. 343
14.2.1 I²C Bus Functional Overview .................................................................................................... 344
14.2.2 Available Speed Modes ........................................................................................................... 346
14.2.3 Interrupts ................................................................................................................................ 347
14.2.4 Loopback Operation ................................................................................................................ 347
14.2.5 Command Sequence Flow Charts ............................................................................................ 348
November 30, 2007
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Preliminary