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LM3S2016 Datasheet, PDF (435/468 Pages) List of Unclassifed Manufacturers – Microcontroller
LM3S2016 Microcontroller
19.1.5
Table 19-4. Detailed Power Specifications
Parameter Parameter Name
IDD_RUN
Run mode 1 (Flash
loop)
Conditions
VDD25 = 2.50 V
Code= while(1){} executed in Flash
3.3 V VDD, VDDA,
VDDPHY
Nom
Max
3
pendinga
2.5 V VDD25 Unit
Nom Max
108 pendinga mA
Peripherals = All ON
System Clock = 50 MHz (with PLL)
Run mode 2 (Flash VDD25 = 2.50 V
0
loop)
Code= while(1){} executed in Flash
pendinga 53 pendinga mA
Peripherals = All OFF
System Clock = 50 MHz (with PLL)
Run mode 1 (SRAM VDD25 = 2.50 V
3
loop)
Code= while(1){} executed in SRAM
pendinga 102 pendinga mA
Peripherals = All ON
System Clock = 50 MHz (with PLL)
Run mode 2 (SRAM VDD25 = 2.50 V
0
loop)
Code= while(1){} executed in SRAM
pendinga 47 pendinga mA
Peripherals = All OFF
IDD_SLEEP Sleep mode
System Clock = 50 MHz (with PLL)
VDD25 = 2.50 V
0
pendinga 17 pendinga mA
Peripherals = All OFF
IDD_DEEPSLEEP Deep-Sleep mode
System Clock = 50 MHz (with PLL)
LDO = 2.25 V
Peripherals = All OFF
0.143
pendinga 0.18 pendinga mA
System Clock = IOSC30KHZ/64
a. Pending characterization completion.
Flash Memory Characteristics
Table 19-5. Flash Memory Characteristics
Parameter Parameter Name
Min Nom Max Unit
PECYC Number of guaranteed program/erase cycles before failurea 10,000 100,000 - cycles
TRET Data retention at average operating temperature of 85˚C
10
-
- years
TPROG Word program time
20
-
- µs
TERASE Page erase time
20
-
- ms
TME Mass erase time
200
-
- ms
a. A program/erase cycle is defined as switching the bits from 1-> 0 -> 1.
November 30, 2007
435
Preliminary