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MC3610 Datasheet, PDF (48/67 Pages) List of Unclassifed Manufacturers – Axis Accelerometer
MC3610 3-Axis Accelerometer
Preliminary Datasheet
8.13 (0x16) FIFO Control Register
This register selects the FIFO threshold level, operation mode, FIFO reset and enable. With
the exception of FIFO_RESET, the FIFO_EN bit must be ‘1’ for any FIFO interrupts,
thresholds, or modes to be enabled. The FIFO flags in register 0x08 will continue to report
FIFO defaults even if the FIFO_EN is ‘0’.
Addr
0x16
Name
FIFO_C
Bit
POR Value R/W
7
6
5
4
3
2
1
0
FIFO_
RESET
FIFO_EN
FIFO_
MODE
FIFO_TH FIFO_TH FIFO_TH FIFO_TH FIFO_TH
[4]
[3]
[2]
[1]
[0]
00000000
RW
Bit
Name
Description
4:0 FIFO_TH[4:0] The FIFO threshold level selects the number of samples in the FIFO
for different FIFO events. The threshold value may be 1 to 31 (00001
to 11111).
5 FIFO_MODE 0: Normal operation, the FIFO continues to accept new sample data as
long as there is space remaining (default)
1: Watermark, once the amount of samples in the FIFO reaches or
exceeds the threshold level, the FIFO stops accepting new sample
data. Any additional sample data is “dropped”.
6 FIFO_EN
FIFO enable control. All FIFO operations are gated by this bit.
0: No FIFO operation, sample data written directly to output registers.
1: FIFO enabled, all sample data written to FIFO write port if there is
room. The FIFO write clock is controlled by this enable, resulting in
higher dynamic power.
7 FIFO_RESET Asynchronous FIFO reset.
0: FIFO reset is disabled, normal operation (default)
1: FIFO read and write pointers are cleared, FIFO contents returned to
0
Table 23. FIFO Control Register Settings
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