MC3610 Datasheet, PDF (24/67 Pages) List of Unclassifed Manufacturers – Axis Accelerometer

MC3610 3-Axis Accelerometer
Preliminary Datasheet
time a new full condition is detected. Register 0x17 bit 5 must be ‘1’ for this interrupt to be
enabled.
6.7 INTERRUPT ON FIFO THRESHOLD (INT_FIFO_THRESH)
The FIFO_THRESH flag at register 0x08 bit 6 is set to ‘1’ when the number of samples in the
FIFO is the same or greater than the threshold level specified in the FIFO Control Register
0x16 bits [4:0]. This condition will generate an interrupt when register 0x09 bit 6 is set to ‘1’.
Register 0x17 bit 6 must be ‘1’ for this interrupt to be enabled.
6.8 SERVICING
Register 0x17 (Interrupt Control Register) determines which events generate interrupts. When
an event is detected, it is masked with the appropriate interrupt enable bit in register 0x17. The
corresponding status bit then is set in register 0x09. Multiple interrupt events may be reported
at the same time in the STATUS_2 register, so software must interpret and prioritize the
results. If register 0x09 is not read frequently enough, multiple flags and interrupt events will
accumulate in the register.
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